328 lines
13 KiB
C
328 lines
13 KiB
C
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/**
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*******************************************************************************
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* @file hc32_ll_i2c.h
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* @brief This file contains all the functions prototypes of the Inter-Integrated
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* Circuit(I2C) driver library.
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@verbatim
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Change Logs:
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Date Author Notes
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2022-03-31 CDT First version
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2022-06-30 CDT Add API I2C_SlaveAddrCmd()
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2023-09-30 CDT Modify typo
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Move macro define I2C_SRC_CLK to head file
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@endverbatim
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*******************************************************************************
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* Copyright (C) 2022-2023, Xiaohua Semiconductor Co., Ltd. All rights reserved.
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*
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* This software component is licensed by XHSC under BSD 3-Clause license
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* (the "License"); You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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*******************************************************************************
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*/
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#ifndef __HC32_LL_I2C_H__
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#define __HC32_LL_I2C_H__
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/* C binding of definitions if building with C++ compiler */
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/*******************************************************************************
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* Include files
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******************************************************************************/
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#include "hc32_ll_def.h"
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#include "hc32f4xx.h"
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#include "hc32f4xx_conf.h"
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/**
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* @addtogroup LL_Driver
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* @{
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*/
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/**
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* @addtogroup LL_I2C
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* @{
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*/
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#if (LL_I2C_ENABLE == DDL_ON)
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/*******************************************************************************
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* Global type definitions ('typedef')
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******************************************************************************/
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/**
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* @defgroup I2C_Global_Types I2C Global Types
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* @{
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*/
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/**
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* @brief I2c configuration structure
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*/
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typedef struct {
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uint32_t u32ClockDiv; /*!< I2C clock division for i2c source clock */
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uint32_t u32Baudrate; /*!< I2C baudrate config */
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uint32_t u32SclTime; /*!< The SCL rising and falling time, count of T(i2c source clock after frequency divider) */
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} stc_i2c_init_t;
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/**
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* @}
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*/
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/*******************************************************************************
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* Global pre-processor symbols/macros ('#define')
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******************************************************************************/
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/**
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* @defgroup I2C_Global_Macros I2C Global Macros
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* @{
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*/
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#define I2C_SRC_CLK (SystemCoreClock >> ((CM_CMU->SCFGR & CMU_SCFGR_PCLK3S) >> CMU_SCFGR_PCLK3S_POS))
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#define I2C_WIDTH_MAX_IMME (68UL)
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/**
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* @defgroup I2C_Trans_Dir I2C Transfer Direction
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* @{
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*/
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#define I2C_DIR_TX (0x0U)
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#define I2C_DIR_RX (0x1U)
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/**
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* @}
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*/
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/**
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* @defgroup I2C_Addr_Config I2C Address Configure
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* @{
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*/
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#define I2C_ADDR_DISABLE (0U)
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#define I2C_ADDR_7BIT (I2C_SLR0_SLADDR0EN)
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#define I2C_ADDR_10BIT (I2C_SLR0_ADDRMOD0 | I2C_SLR0_SLADDR0EN)
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/**
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* @}
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*/
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/**
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* @defgroup I2C_Clock_Division I2C Clock Division
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* @{
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*/
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#define I2C_CLK_DIV1 (0UL) /*!< I2c source clock/1 */
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#define I2C_CLK_DIV2 (1UL) /*!< I2c source clock/2 */
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#define I2C_CLK_DIV4 (2UL) /*!< I2c source clock/4 */
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#define I2C_CLK_DIV8 (3UL) /*!< I2c source clock/8 */
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#define I2C_CLK_DIV16 (4UL) /*!< I2c source clock/16 */
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#define I2C_CLK_DIV32 (5UL) /*!< I2c source clock/32 */
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#define I2C_CLK_DIV64 (6UL) /*!< I2c source clock/64 */
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#define I2C_CLK_DIV128 (7UL) /*!< I2c source clock/128 */
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/**
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* @}
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*/
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/**
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* @defgroup I2C_Address_Num I2C Address Number
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* @{
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*/
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#define I2C_ADDR0 (0UL)
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#define I2C_ADDR1 (1UL)
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/**
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* @}
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*/
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/**
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* @defgroup I2C_Ack_Config I2C ACK Configure
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* @{
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*/
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#define I2C_ACK (0UL) /*!< Send ACK after date receive */
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#define I2C_NACK (I2C_CR1_ACK) /*!< Send NACK after date received */
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/**
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* @}
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*/
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/**
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* @defgroup I2C_Smbus_Match_Config I2C SMBUS Address Match Configure
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* @{
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*/
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#define I2C_SMBUS_MATCH_ALARM (I2C_CR1_SMBALRTEN)
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#define I2C_SMBUS_MATCH_DEFAULT (I2C_CR1_SMBDEFAULTEN)
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#define I2C_SMBUS_MATCH_HOST (I2C_CR1_SMBHOSTEN)
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#define I2C_SMBUS_MATCH_ALL (I2C_CR1_SMBALRTEN | I2C_CR1_SMBDEFAULTEN | I2C_CR1_SMBHOSTEN)
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/**
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* @}
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*/
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/**
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* @defgroup I2C_Digital_Filter_Clock I2C Digital Filter Clock
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* @{
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*/
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#define I2C_DIG_FILTER_CLK_DIV1 (0UL << I2C_FLTR_DNF_POS) /*!< I2C Clock/1 */
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#define I2C_DIG_FILTER_CLK_DIV2 (1UL << I2C_FLTR_DNF_POS) /*!< I2C Clock/2 */
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#define I2C_DIG_FILTER_CLK_DIV3 (2UL << I2C_FLTR_DNF_POS) /*!< I2C Clock/3 */
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#define I2C_DIG_FILTER_CLK_DIV4 (3UL << I2C_FLTR_DNF_POS) /*!< I2C Clock/4 */
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/**
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* @}
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*/
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/**
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* @defgroup I2C_Flag I2C Flag
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* @{
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*/
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#define I2C_FLAG_START (I2C_SR_STARTF) /*!< Start condition detected */
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#define I2C_FLAG_MATCH_ADDR0 (I2C_SR_SLADDR0F) /*!< Address 0 detected */
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#define I2C_FLAG_MATCH_ADDR1 (I2C_SR_SLADDR1F) /*!< Address 1 detected */
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#define I2C_FLAG_TX_CPLT (I2C_SR_TENDF) /*!< Transfer end */
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#define I2C_FLAG_STOP (I2C_SR_STOPF) /*!< Stop condition detected */
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#define I2C_FLAG_RX_FULL (I2C_SR_RFULLF) /*!< Receive buffer full */
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#define I2C_FLAG_TX_EMPTY (I2C_SR_TEMPTYF) /*!< Transfer buffer empty */
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#define I2C_FLAG_ARBITRATE_FAIL (I2C_SR_ARLOF) /*!< Arbitration fails */
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#define I2C_FLAG_ACKR (I2C_SR_ACKRF) /*!< ACK status */
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#define I2C_FLAG_NACKF (I2C_SR_NACKF) /*!< NACK detected */
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#define I2C_FLAG_TMOUTF (I2C_SR_TMOUTF) /*!< Time out detected */
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#define I2C_FLAG_MASTER (I2C_SR_MSL) /*!< Master mode flag */
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#define I2C_FLAG_BUSY (I2C_SR_BUSY) /*!< Bus busy status */
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#define I2C_FLAG_TRA (I2C_SR_TRA) /*!< Transfer mode flag */
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#define I2C_FLAG_GENERAL_CALL (I2C_SR_GENCALLF) /*!< General call detected */
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#define I2C_FLAG_SMBUS_DEFAULT_MATCH (I2C_SR_SMBDEFAULTF) /*!< SMBUS default address detected */
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#define I2C_FLAG_SMBUS_HOST_MATCH (I2C_SR_SMBHOSTF) /*!< SMBUS host address detected */
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#define I2C_FLAG_SMBUS_ALARM_MATCH (I2C_SR_SMBALRTF) /*!< SMBUS alarm address detected */
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#define I2C_FLAG_CLR_ALL (I2C_FLAG_START | I2C_FLAG_MATCH_ADDR0 | I2C_FLAG_MATCH_ADDR1 \
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| I2C_FLAG_TX_CPLT | I2C_FLAG_STOP | I2C_FLAG_RX_FULL | I2C_FLAG_TX_EMPTY \
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| I2C_FLAG_ARBITRATE_FAIL | I2C_FLAG_NACKF | I2C_FLAG_TMOUTF \
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| I2C_FLAG_GENERAL_CALL | I2C_FLAG_SMBUS_DEFAULT_MATCH \
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| I2C_FLAG_SMBUS_HOST_MATCH | I2C_FLAG_SMBUS_ALARM_MATCH)
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#define I2C_FLAG_ALL (I2C_FLAG_START | I2C_FLAG_MATCH_ADDR0 | I2C_FLAG_MATCH_ADDR1 | I2C_FLAG_TX_CPLT \
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| I2C_FLAG_STOP | I2C_FLAG_RX_FULL | I2C_FLAG_TX_EMPTY | I2C_FLAG_ARBITRATE_FAIL\
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| I2C_FLAG_ACKR | I2C_FLAG_NACKF | I2C_FLAG_TMOUTF | I2C_FLAG_MASTER \
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| I2C_FLAG_BUSY | I2C_FLAG_TRA | I2C_FLAG_GENERAL_CALL \
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| I2C_FLAG_SMBUS_DEFAULT_MATCH | I2C_FLAG_SMBUS_HOST_MATCH \
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| I2C_FLAG_SMBUS_ALARM_MATCH)
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/**
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* @}
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*/
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/**
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* @defgroup I2C_Int_Flag I2C Interrupt Flag Bits
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* @{
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*/
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#define I2C_INT_START (I2C_CR2_STARTIE)
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#define I2C_INT_MATCH_ADDR0 (I2C_CR2_SLADDR0IE)
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#define I2C_INT_MATCH_ADDR1 (I2C_CR2_SLADDR1IE)
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#define I2C_INT_TX_CPLT (I2C_CR2_TENDIE)
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#define I2C_INT_STOP (I2C_CR2_STOPIE)
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#define I2C_INT_RX_FULL (I2C_CR2_RFULLIE)
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#define I2C_INT_TX_EMPTY (I2C_CR2_TEMPTYIE)
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#define I2C_INT_ARBITRATE_FAIL (I2C_CR2_ARLOIE)
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#define I2C_INT_NACK (I2C_CR2_NACKIE)
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#define I2C_INT_TMOUTIE (I2C_CR2_TMOUTIE)
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#define I2C_INT_GENERAL_CALL (I2C_CR2_GENCALLIE)
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#define I2C_INT_SMBUS_DEFAULT_MATCH (I2C_CR2_SMBDEFAULTIE)
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#define I2C_INT_SMBUS_HOST_MATCH (I2C_CR2_SMBHOSTIE)
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#define I2C_INT_SMBUS_ALARM_MATCH (I2C_CR2_SMBALRTIE)
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#define I2C_INT_ALL (I2C_INT_START | I2C_INT_MATCH_ADDR0 | I2C_INT_MATCH_ADDR1 | I2C_INT_TX_CPLT \
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| I2C_INT_STOP | I2C_INT_RX_FULL | I2C_INT_TX_EMPTY | I2C_INT_ARBITRATE_FAIL \
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| I2C_INT_NACK | I2C_INT_TMOUTIE | I2C_INT_GENERAL_CALL \
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| I2C_INT_SMBUS_DEFAULT_MATCH | I2C_INT_SMBUS_HOST_MATCH \
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| I2C_INT_SMBUS_ALARM_MATCH)
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/**
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* @}
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*/
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/**
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* @}
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*/
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/*******************************************************************************
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* Global variable definitions ('extern')
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******************************************************************************/
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/*******************************************************************************
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Global function prototypes (definition in C source)
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******************************************************************************/
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/**
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* @addtogroup I2C_Global_Functions
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* @{
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*/
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/* Initialization and Configuration **********************************/
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int32_t I2C_StructInit(stc_i2c_init_t *pstcI2cInit);
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int32_t I2C_BaudrateConfig(CM_I2C_TypeDef *I2Cx, const stc_i2c_init_t *pstcI2cInit, float32_t *pf32Error);
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void I2C_DeInit(CM_I2C_TypeDef *I2Cx);
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int32_t I2C_Init(CM_I2C_TypeDef *I2Cx, const stc_i2c_init_t *pstcI2cInit, float32_t *pf32Error);
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void I2C_SlaveAddrConfig(CM_I2C_TypeDef *I2Cx, uint32_t u32AddrNum, uint32_t u32AddrMode, uint32_t u32Addr);
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void I2C_SlaveAddrCmd(CM_I2C_TypeDef *I2Cx, uint32_t u32AddrNum, en_functional_state_t enNewState);
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void I2C_Cmd(CM_I2C_TypeDef *I2Cx, en_functional_state_t enNewState);
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void I2C_FastAckCmd(CM_I2C_TypeDef *I2Cx, en_functional_state_t enNewState);
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void I2C_BusWaitCmd(CM_I2C_TypeDef *I2Cx, en_functional_state_t enNewState);
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void I2C_SmbusConfig(CM_I2C_TypeDef *I2Cx, uint32_t u32SmbusConfig, en_functional_state_t enNewState);
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void I2C_SmbusCmd(CM_I2C_TypeDef *I2Cx, en_functional_state_t enNewState);
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void I2C_DigitalFilterConfig(CM_I2C_TypeDef *I2Cx, uint32_t u32FilterClock);
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void I2C_DigitalFilterCmd(CM_I2C_TypeDef *I2Cx, en_functional_state_t enNewState);
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void I2C_AnalogFilterCmd(CM_I2C_TypeDef *I2Cx, en_functional_state_t enNewState);
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void I2C_GeneralCallCmd(CM_I2C_TypeDef *I2Cx, en_functional_state_t enNewState);
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void I2C_SWResetCmd(CM_I2C_TypeDef *I2Cx, en_functional_state_t enNewState);
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void I2C_IntCmd(CM_I2C_TypeDef *I2Cx, uint32_t u32IntType, en_functional_state_t enNewState);
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/* Start/Restart/Stop ************************************************/
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void I2C_GenerateStart(CM_I2C_TypeDef *I2Cx);
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void I2C_GenerateRestart(CM_I2C_TypeDef *I2Cx);
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void I2C_GenerateStop(CM_I2C_TypeDef *I2Cx);
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/* Status management *************************************************/
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en_flag_status_t I2C_GetStatus(const CM_I2C_TypeDef *I2Cx, uint32_t u32Flag);
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void I2C_ClearStatus(CM_I2C_TypeDef *I2Cx, uint32_t u32Flag);
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/* Data transfer *****************************************************/
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void I2C_WriteData(CM_I2C_TypeDef *I2Cx, uint8_t u8Data);
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uint8_t I2C_ReadData(const CM_I2C_TypeDef *I2Cx);
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void I2C_AckConfig(CM_I2C_TypeDef *I2Cx, uint32_t u32AckConfig);
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/* Time out function *************************************************/
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void I2C_SCLHighTimeoutConfig(CM_I2C_TypeDef *I2Cx, uint16_t u16TimeoutH);
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void I2C_SCLLowTimeoutConfig(CM_I2C_TypeDef *I2Cx, uint16_t u16TimeoutL);
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void I2C_SCLHighTimeoutCmd(CM_I2C_TypeDef *I2Cx, en_functional_state_t enNewState);
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void I2C_SCLLowTimeoutCmd(CM_I2C_TypeDef *I2Cx, en_functional_state_t enNewState);
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void I2C_SCLTimeoutCmd(CM_I2C_TypeDef *I2Cx, en_functional_state_t enNewState);
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/* High level functions for reference ********************************/
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int32_t I2C_Start(CM_I2C_TypeDef *I2Cx, uint32_t u32Timeout);
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int32_t I2C_Restart(CM_I2C_TypeDef *I2Cx, uint32_t u32Timeout);
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int32_t I2C_TransAddr(CM_I2C_TypeDef *I2Cx, uint16_t u16Addr, uint8_t u8Dir, uint32_t u32Timeout);
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int32_t I2C_Trans10BitAddr(CM_I2C_TypeDef *I2Cx, uint16_t u16Addr, uint8_t u8Dir, uint32_t u32Timeout);
|
||
|
|
int32_t I2C_TransData(CM_I2C_TypeDef *I2Cx, uint8_t const au8TxData[], uint32_t u32Size, uint32_t u32Timeout);
|
||
|
|
int32_t I2C_ReceiveData(CM_I2C_TypeDef *I2Cx, uint8_t au8RxData[], uint32_t u32Size, uint32_t u32Timeout);
|
||
|
|
int32_t I2C_MasterReceiveDataAndStop(CM_I2C_TypeDef *I2Cx, uint8_t au8RxData[], uint32_t u32Size, uint32_t u32Timeout);
|
||
|
|
int32_t I2C_Stop(CM_I2C_TypeDef *I2Cx, uint32_t u32Timeout);
|
||
|
|
int32_t I2C_WaitStatus(const CM_I2C_TypeDef *I2Cx, uint32_t u32Flag, en_flag_status_t enStatus, uint32_t u32Timeout);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
#endif /* LL_I2C_ENABLE */
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
#ifdef __cplusplus
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#endif /* __HC32_LL_I2C_H__ */
|
||
|
|
|
||
|
|
/*******************************************************************************
|
||
|
|
* EOF (not truncated)
|
||
|
|
******************************************************************************/
|