204 lines
6.7 KiB
C
204 lines
6.7 KiB
C
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/**
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*******************************************************************************
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* @file hc32_ll_fcg.h
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* @brief This file contains all the functions prototypes of the FCG driver
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* library.
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@verbatim
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Change Logs:
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Date Author Notes
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2022-03-31 CDT First version
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@endverbatim
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*******************************************************************************
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* Copyright (C) 2022-2023, Xiaohua Semiconductor Co., Ltd. All rights reserved.
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*
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* This software component is licensed by XHSC under BSD 3-Clause license
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* (the "License"); You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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*******************************************************************************
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*/
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#ifndef __HC32_LL_FCG_H__
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#define __HC32_LL_FCG_H__
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/* C binding of definitions if building with C++ compiler */
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/*******************************************************************************
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* Include files
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******************************************************************************/
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#include "hc32_ll_def.h"
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#include "hc32f4xx.h"
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#include "hc32f4xx_conf.h"
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/**
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* @addtogroup LL_Driver
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* @{
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*/
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/**
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* @addtogroup LL_FCG
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* @{
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*/
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#if (LL_FCG_ENABLE == DDL_ON)
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/*******************************************************************************
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* Global type definitions ('typedef')
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******************************************************************************/
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/*******************************************************************************
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* Global pre-processor symbols/macros ('#define')
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******************************************************************************/
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/**
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* @defgroup FCG_Global_Macros FCG Global Macros
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* @{
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*/
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/**
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* @defgroup FCG_FCG0_Peripheral FCG FCG0 peripheral
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* @{
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*/
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#define FCG0_PERIPH_SRAMH (PWC_FCG0_SRAMH)
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#define FCG0_PERIPH_SRAM12 (PWC_FCG0_SRAM12)
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#define FCG0_PERIPH_SRAM3 (PWC_FCG0_SRAM3)
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#define FCG0_PERIPH_SRAMRET (PWC_FCG0_SRAMRET)
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#define FCG0_PERIPH_DMA1 (PWC_FCG0_DMA1)
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#define FCG0_PERIPH_DMA2 (PWC_FCG0_DMA2)
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#define FCG0_PERIPH_FCM (PWC_FCG0_FCM)
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#define FCG0_PERIPH_AOS (PWC_FCG0_AOS)
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#define FCG0_PERIPH_AES (PWC_FCG0_AES)
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#define FCG0_PERIPH_HASH (PWC_FCG0_HASH)
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#define FCG0_PERIPH_TRNG (PWC_FCG0_TRNG)
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#define FCG0_PERIPH_CRC (PWC_FCG0_CRC)
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#define FCG0_PERIPH_DCU1 (PWC_FCG0_DCU1)
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#define FCG0_PERIPH_DCU2 (PWC_FCG0_DCU2)
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#define FCG0_PERIPH_DCU3 (PWC_FCG0_DCU3)
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#define FCG0_PERIPH_DCU4 (PWC_FCG0_DCU4)
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#define FCG0_PERIPH_KEY (PWC_FCG0_KEY)
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/**
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* @}
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*/
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/**
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* @defgroup FCG_FCG1_Peripheral FCG FCG1 peripheral
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* @{
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*/
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#define FCG1_PERIPH_CAN (PWC_FCG1_CAN)
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#define FCG1_PERIPH_QSPI (PWC_FCG1_QSPI)
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#define FCG1_PERIPH_I2C1 (PWC_FCG1_I2C1)
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#define FCG1_PERIPH_I2C2 (PWC_FCG1_I2C2)
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#define FCG1_PERIPH_I2C3 (PWC_FCG1_I2C3)
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#define FCG1_PERIPH_USBFS (PWC_FCG1_USBFS)
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#define FCG1_PERIPH_SDIOC1 (PWC_FCG1_SDIOC1)
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#define FCG1_PERIPH_SDIOC2 (PWC_FCG1_SDIOC2)
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#define FCG1_PERIPH_I2S1 (PWC_FCG1_I2S1)
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#define FCG1_PERIPH_I2S2 (PWC_FCG1_I2S2)
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#define FCG1_PERIPH_I2S3 (PWC_FCG1_I2S3)
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#define FCG1_PERIPH_I2S4 (PWC_FCG1_I2S4)
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#define FCG1_PERIPH_SPI1 (PWC_FCG1_SPI1)
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#define FCG1_PERIPH_SPI2 (PWC_FCG1_SPI2)
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#define FCG1_PERIPH_SPI3 (PWC_FCG1_SPI3)
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#define FCG1_PERIPH_SPI4 (PWC_FCG1_SPI4)
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#define FCG1_PERIPH_USART1 (PWC_FCG1_USART1)
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#define FCG1_PERIPH_USART2 (PWC_FCG1_USART2)
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#define FCG1_PERIPH_USART3 (PWC_FCG1_USART3)
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#define FCG1_PERIPH_USART4 (PWC_FCG1_USART4)
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/**
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* @}
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*/
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/**
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* @defgroup FCG_FCG2_Peripheral FCG FCG2 peripheral
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* @{
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*/
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#define FCG2_PERIPH_TMR0_1 (PWC_FCG2_TIMER0_1)
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#define FCG2_PERIPH_TMR0_2 (PWC_FCG2_TIMER0_2)
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#define FCG2_PERIPH_TMRA_1 (PWC_FCG2_TIMERA_1)
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#define FCG2_PERIPH_TMRA_2 (PWC_FCG2_TIMERA_2)
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#define FCG2_PERIPH_TMRA_3 (PWC_FCG2_TIMERA_3)
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#define FCG2_PERIPH_TMRA_4 (PWC_FCG2_TIMERA_4)
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#define FCG2_PERIPH_TMRA_5 (PWC_FCG2_TIMERA_5)
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#define FCG2_PERIPH_TMRA_6 (PWC_FCG2_TIMERA_6)
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#define FCG2_PERIPH_TMR4_1 (PWC_FCG2_TIMER4_1)
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#define FCG2_PERIPH_TMR4_2 (PWC_FCG2_TIMER4_2)
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#define FCG2_PERIPH_TMR4_3 (PWC_FCG2_TIMER4_3)
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#define FCG2_PERIPH_EMB (PWC_FCG2_EMB)
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#define FCG2_PERIPH_TMR6_1 (PWC_FCG2_TIMER6_1)
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#define FCG2_PERIPH_TMR6_2 (PWC_FCG2_TIMER6_2)
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#define FCG2_PERIPH_TMR6_3 (PWC_FCG2_TIMER6_3)
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/**
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* @}
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*/
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/**
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* @defgroup FCG_FCG3_Peripheral FCG FCG3 peripheral
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* @{
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*/
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#define FCG3_PERIPH_ADC1 (PWC_FCG3_ADC1)
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#define FCG3_PERIPH_ADC2 (PWC_FCG3_ADC2)
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#define FCG3_PERIPH_CMP (PWC_FCG3_CMP)
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#define FCG3_PERIPH_OTS (PWC_FCG3_OTS)
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/**
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* @}
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*/
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/**
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* @defgroup FCG_FCGx_Peripheral_Mask FCG FCGx Peripheral Mask
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* @{
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*/
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#define FCG_FCG0_PERIPH_MASK (0x8FF3C511UL)
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#define FCG_FCG1_PERIPH_MASK (0x0F0FFD79UL)
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#define FCG_FCG2_PERIPH_MASK (0x000787FFUL)
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#define FCG_FCG3_PERIPH_MASK (0x00001103UL)
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/**
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* @}
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*/
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/**
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* @}
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*/
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/*******************************************************************************
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* Global variable definitions ('extern')
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******************************************************************************/
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/*******************************************************************************
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Global function prototypes (definition in C source)
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******************************************************************************/
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/**
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* @addtogroup FCG_Global_Functions
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* @{
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*/
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void FCG_Fcg0PeriphClockCmd(uint32_t u32Fcg0Periph, en_functional_state_t enNewState);
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void FCG_Fcg1PeriphClockCmd(uint32_t u32Fcg1Periph, en_functional_state_t enNewState);
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void FCG_Fcg2PeriphClockCmd(uint32_t u32Fcg2Periph, en_functional_state_t enNewState);
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void FCG_Fcg3PeriphClockCmd(uint32_t u32Fcg3Periph, en_functional_state_t enNewState);
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/**
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* @}
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*/
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#endif /* LL_FCG_ENABLE */
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/**
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* @}
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*/
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __HC32_LL_FCG_H__ */
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/*******************************************************************************
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* EOF (not truncated)
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******************************************************************************/
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