228 lines
8.1 KiB
C
228 lines
8.1 KiB
C
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/**
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*******************************************************************************
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* @file hc32_ll_wdt.h
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* @brief This file contains all the functions prototypes of the WDT driver
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* library.
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@verbatim
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Change Logs:
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Date Author Notes
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2022-03-31 CDT First version
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@endverbatim
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*******************************************************************************
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* Copyright (C) 2022-2023, Xiaohua Semiconductor Co., Ltd. All rights reserved.
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*
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* This software component is licensed by XHSC under BSD 3-Clause license
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* (the "License"); You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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*******************************************************************************
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*/
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#ifndef __HC32_LL_WDT_H__
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#define __HC32_LL_WDT_H__
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/* C binding of definitions if building with C++ compiler */
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/*******************************************************************************
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* Include files
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******************************************************************************/
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#include "hc32_ll_def.h"
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#include "hc32f4xx.h"
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#include "hc32f4xx_conf.h"
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/**
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* @addtogroup LL_Driver
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* @{
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*/
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/**
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* @addtogroup LL_WDT
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* @{
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*/
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#if (LL_WDT_ENABLE == DDL_ON)
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/*******************************************************************************
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* Global type definitions ('typedef')
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******************************************************************************/
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/**
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* @defgroup WDT_Global_Types WDT Global Types
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* @{
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*/
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/**
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* @brief WDT Init structure definition
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*/
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typedef struct {
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uint32_t u32CountPeriod; /*!< Specifies the counting period of WDT.
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This parameter can be a value of @ref WDT_Count_Period */
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uint32_t u32ClockDiv; /*!< Specifies the clock division factor of WDT.
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This parameter can be a value of @ref WDT_Clock_Division */
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uint32_t u32RefreshRange; /*!< Specifies the allow refresh range of WDT.
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This parameter can be a value of @ref WDT_Refresh_Range */
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uint32_t u32LPMCount; /*!< Specifies the count state in Low Power Mode (Sleep Mode).
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This parameter can be a value of @ref WDT_LPM_Count */
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uint32_t u32ExceptionType; /*!< Specifies the type of exception response for WDT.
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This parameter can be a value of @ref WDT_Exception_Type */
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} stc_wdt_init_t;
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/**
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* @}
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*/
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/*******************************************************************************
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* Global pre-processor symbols/macros ('#define')
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******************************************************************************/
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/**
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* @defgroup WDT_Global_Macros WDT Global Macros
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* @{
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*/
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/**
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* @defgroup WDT_Count_Period WDT Count Period
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* @{
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*/
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#define WDT_CNT_PERIOD256 (0UL) /*!< 256 clock cycle */
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#define WDT_CNT_PERIOD4096 (WDT_CR_PERI_0) /*!< 4096 clock cycle */
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#define WDT_CNT_PERIOD16384 (WDT_CR_PERI_1) /*!< 16384 clock cycle */
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#define WDT_CNT_PERIOD65536 (WDT_CR_PERI) /*!< 65536 clock cycle */
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/**
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* @}
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*/
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/**
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* @defgroup WDT_Clock_Division WDT Clock Division
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* @{
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*/
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#define WDT_CLK_DIV4 (0x02UL << WDT_CR_CKS_POS) /*!< PLCKx/4 */
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#define WDT_CLK_DIV64 (0x06UL << WDT_CR_CKS_POS) /*!< PLCKx/64 */
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#define WDT_CLK_DIV128 (0x07UL << WDT_CR_CKS_POS) /*!< PLCKx/128 */
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#define WDT_CLK_DIV256 (0x08UL << WDT_CR_CKS_POS) /*!< PLCKx/256 */
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#define WDT_CLK_DIV512 (0x09UL << WDT_CR_CKS_POS) /*!< PLCKx/512 */
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#define WDT_CLK_DIV1024 (0x0AUL << WDT_CR_CKS_POS) /*!< PLCKx/1024 */
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#define WDT_CLK_DIV2048 (0x0BUL << WDT_CR_CKS_POS) /*!< PLCKx/2048 */
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#define WDT_CLK_DIV8192 (0x0DUL << WDT_CR_CKS_POS) /*!< PLCKx/8192 */
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/**
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* @}
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*/
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/**
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* @defgroup WDT_Refresh_Range WDT Refresh Range
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* @{
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*/
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#define WDT_RANGE_0TO25PCT (0x01UL << WDT_CR_WDPT_POS) /*!< 0%~25% */
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#define WDT_RANGE_25TO50PCT (0x02UL << WDT_CR_WDPT_POS) /*!< 25%~50% */
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#define WDT_RANGE_0TO50PCT (0x03UL << WDT_CR_WDPT_POS) /*!< 0%~50% */
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#define WDT_RANGE_50TO75PCT (0x04UL << WDT_CR_WDPT_POS) /*!< 50%~75% */
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#define WDT_RANGE_0TO25PCT_50TO75PCT (0x05UL << WDT_CR_WDPT_POS) /*!< 0%~25% & 50%~75% */
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#define WDT_RANGE_25TO75PCT (0x06UL << WDT_CR_WDPT_POS) /*!< 25%~75% */
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#define WDT_RANGE_0TO75PCT (0x07UL << WDT_CR_WDPT_POS) /*!< 0%~75% */
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#define WDT_RANGE_75TO100PCT (0x08UL << WDT_CR_WDPT_POS) /*!< 75%~100% */
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#define WDT_RANGE_0TO25PCT_75TO100PCT (0x09UL << WDT_CR_WDPT_POS) /*!< 0%~25% & 75%~100% */
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#define WDT_RANGE_25TO50PCT_75TO100PCT (0x0AUL << WDT_CR_WDPT_POS) /*!< 25%~50% & 75%~100% */
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#define WDT_RANGE_0TO50PCT_75TO100PCT (0x0BUL << WDT_CR_WDPT_POS) /*!< 0%~50% & 75%~100% */
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#define WDT_RANGE_50TO100PCT (0x0CUL << WDT_CR_WDPT_POS) /*!< 50%~100% */
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#define WDT_RANGE_0TO25PCT_50TO100PCT (0x0DUL << WDT_CR_WDPT_POS) /*!< 0%~25% & 50%~100% */
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#define WDT_RANGE_25TO100PCT (0x0EUL << WDT_CR_WDPT_POS) /*!< 25%~100% */
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#define WDT_RANGE_0TO100PCT (0x0FUL << WDT_CR_WDPT_POS) /*!< 0%~100% */
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/**
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* @}
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*/
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/**
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* @defgroup WDT_LPM_Count WDT Low Power Mode Count
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* @brief Counting control of WDT in sleep mode.
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* @{
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*/
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#define WDT_LPM_CNT_CONTINUE (0UL) /*!< Continue counting in sleep mode */
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#define WDT_LPM_CNT_STOP (WDT_CR_SLPOFF) /*!< Stop counting in sleep mode */
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/**
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* @}
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*/
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/**
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* @defgroup WDT_Exception_Type WDT Exception Type
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* @brief Specifies the exception response when a refresh error or count overflow occurs.
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* @{
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*/
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#define WDT_EXP_TYPE_INT (0UL) /*!< WDT trigger interrupt */
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#define WDT_EXP_TYPE_RST (WDT_CR_ITS) /*!< WDT trigger reset */
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/**
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* @}
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*/
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/**
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* @defgroup WDT_Flag WDT Flag
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* @{
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*/
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#define WDT_FLAG_UDF (WDT_SR_UDF) /*!< Count underflow flag */
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#define WDT_FLAG_REFRESH (WDT_SR_REF) /*!< Refresh error flag */
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#define WDT_FLAG_ALL (WDT_SR_UDF | WDT_SR_REF)
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/**
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* @}
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*/
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/**
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* @}
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*/
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/*******************************************************************************
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* Global variable definitions ('extern')
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******************************************************************************/
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/*******************************************************************************
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Global function prototypes (definition in C source)
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******************************************************************************/
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/**
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* @addtogroup WDT_Global_Functions
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* @{
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*/
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/**
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* @brief Get WDT count value.
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* @param None
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* @retval uint16_t Count value
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*/
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__STATIC_INLINE uint16_t WDT_GetCountValue(void)
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{
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return (uint16_t)(READ_REG32(CM_WDT->SR) & WDT_SR_CNT);
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}
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/* Initialization and configuration functions */
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int32_t WDT_Init(const stc_wdt_init_t *pstcWdtInit);
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void WDT_FeedDog(void);
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uint16_t WDT_GetCountValue(void);
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/* Flags management functions */
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en_flag_status_t WDT_GetStatus(uint32_t u32Flag);
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int32_t WDT_ClearStatus(uint32_t u32Flag);
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/**
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* @}
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*/
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#endif /* LL_WDT_ENABLE */
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/**
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* @}
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*/
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __HC32_LL_WDT_H__ */
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/*******************************************************************************
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* EOF (not truncated)
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******************************************************************************/
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