初始版本
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;/******************************************************************************
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;* Copyright (C) 2019, Huada Semiconductor Co.,Ltd All rights reserved.
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;*
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;* This software is owned and published by:
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;* Huada Semiconductor Co.,Ltd ("HDSC").
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;*
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;* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
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;* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
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;*
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;* This software contains source code for use with HDSC
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;* components. This software is licensed by HDSC to be adapted only
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;* for use in systems utilizing HDSC components. HDSC shall not be
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;* responsible for misuse or illegal use of this software for devices not
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;* supported herein. HDSC is providing this software "AS IS" and will
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;* not be responsible for issues arising from incorrect user implementation
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;* of the software.
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;*
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;* Disclaimer:
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;* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
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;* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
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;* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
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;* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
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;* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
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;* WARRANTY OF NONINFRINGEMENT.
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;* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
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;* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
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;* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
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;* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
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;* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
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;* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
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;* SAVINGS OR PROFITS,
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;* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
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;* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
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;* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
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;* FROM, THE SOFTWARE.
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;*
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;* This software may be replicated in part or whole for the licensed use,
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;* with the restriction that this Disclaimer and Copyright notice must be
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;* included with each copy of this software, whether used in part or whole,
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;* at all times.
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;*/
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;/*****************************************************************************/
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;/*****************************************************************************/
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;/* Startup for ARM */
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;/* Version V1.0 */
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;/* Date 2019-03-01 */
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;/* Target-mcu {MCU_PN_H} */
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;/*****************************************************************************/
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; Stack Configuration
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; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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Stack_Size EQU 0x00002200
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new_vect_table EQU 0x00002A00 ;中断向量偏移长度
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AREA STACK, NOINIT, READWRITE, ALIGN=3
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Stack_Mem SPACE Stack_Size
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__initial_sp
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; Heap Configuration
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; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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Heap_Size EQU 0x00000200
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AREA HEAP, NOINIT, READWRITE, ALIGN=3
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__heap_base
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Heap_Mem SPACE Heap_Size
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__heap_limit
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PRESERVE8
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THUMB
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; Vector Table Mapped to Address 0 at Reset
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AREA RESET, DATA, READONLY
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EXPORT __Vectors
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EXPORT __Vectors_End
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EXPORT __Vectors_Size
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__Vectors
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DCD __initial_sp ; Top of Stack
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DCD Reset_Handler ; Reset
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DCD NMI_Handler ; NMI
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DCD HardFault_Handler ; Hard Fault
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD SVC_Handler ; SVCall
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD PendSV_Handler ; PendSV
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DCD SysTick_Handler ; SysTick
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DCD PORTA_IRQHandler
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DCD PORTB_IRQHandler
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DCD PORTC_E_IRQHandler
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DCD PORTD_F_IRQHandler
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DCD DMAC_IRQHandler
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DCD TIM3_IRQHandler
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DCD UART0_2_IRQHandler
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DCD UART1_3_IRQHandler
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DCD LPUART0_IRQHandler
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DCD LPUART1_IRQHandler
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DCD SPI0_IRQHandler
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DCD SPI1_IRQHandler
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DCD I2C0_IRQHandler
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DCD I2C1_IRQHandler
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DCD TIM0_IRQHandler
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DCD TIM1_IRQHandler
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DCD TIM2_IRQHandler
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DCD LPTIM0_1_IRQHandler
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DCD TIM4_IRQHandler
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DCD TIM5_IRQHandler
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DCD TIM6_IRQHandler
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DCD PCA_IRQHandler
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DCD WDT_IRQHandler
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DCD RTC_IRQHandler
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DCD ADC_DAC_IRQHandler
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DCD PCNT_IRQHandler
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DCD VC0_IRQHandler
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DCD VC1_2_IRQHandler
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DCD LVD_IRQHandler
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DCD LCD_IRQHandler
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DCD FLASH_RAM_IRQHandler
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DCD CLKTRIM_IRQHandler
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__Vectors_End
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__Vectors_Size EQU __Vectors_End - __Vectors
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AREA |.text|, CODE, READONLY
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; Reset Handler
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Reset_Handler PROC
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EXPORT Reset_Handler [WEAK]
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IMPORT SystemInit
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IMPORT __main
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;reset NVIC if in rom debug
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LDR R0, =0x20000000
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LDR R2, =0x0
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MOVS R1, #0 ; for warning,
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ADD R1, PC,#0 ; for A1609W,
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CMP R1, R0
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BLS RAMCODE
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; ram code base address.
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ADD R2, R0,R2
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RAMCODE
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; reset Vector table address.
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LDR R0, =0xE000ED08
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LDR R2, =new_vect_table ;升级时打开
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STR R2, [R0]
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LDR R0, =SystemInit
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BLX R0
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LDR R0, =__main
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BX R0
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ENDP
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; Dummy Exception Handlers (infinite loops which can be modified)
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NMI_Handler PROC
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EXPORT NMI_Handler [WEAK]
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B .
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ENDP
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HardFault_Handler\
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PROC
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EXPORT HardFault_Handler [WEAK]
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B .
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ENDP
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SVC_Handler PROC
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EXPORT SVC_Handler [WEAK]
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B .
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ENDP
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PendSV_Handler PROC
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EXPORT PendSV_Handler [WEAK]
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B .
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ENDP
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SysTick_Handler PROC
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EXPORT SysTick_Handler [WEAK]
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B .
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ENDP
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Default_Handler PROC
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EXPORT PORTA_IRQHandler [WEAK]
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EXPORT PORTB_IRQHandler [WEAK]
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EXPORT PORTC_E_IRQHandler [WEAK]
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EXPORT PORTD_F_IRQHandler [WEAK]
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EXPORT DMAC_IRQHandler [WEAK]
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EXPORT TIM3_IRQHandler [WEAK]
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EXPORT UART0_2_IRQHandler [WEAK]
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EXPORT UART1_3_IRQHandler [WEAK]
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EXPORT LPUART0_IRQHandler [WEAK]
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EXPORT LPUART1_IRQHandler [WEAK]
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EXPORT SPI0_IRQHandler [WEAK]
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EXPORT SPI1_IRQHandler [WEAK]
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EXPORT I2C0_IRQHandler [WEAK]
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EXPORT I2C1_IRQHandler [WEAK]
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EXPORT TIM0_IRQHandler [WEAK]
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EXPORT TIM1_IRQHandler [WEAK]
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EXPORT TIM2_IRQHandler [WEAK]
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EXPORT LPTIM0_1_IRQHandler [WEAK]
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EXPORT TIM4_IRQHandler [WEAK]
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EXPORT TIM5_IRQHandler [WEAK]
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EXPORT TIM6_IRQHandler [WEAK]
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EXPORT PCA_IRQHandler [WEAK]
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EXPORT WDT_IRQHandler [WEAK]
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EXPORT RTC_IRQHandler [WEAK]
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EXPORT ADC_DAC_IRQHandler [WEAK]
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EXPORT PCNT_IRQHandler [WEAK]
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EXPORT VC0_IRQHandler [WEAK]
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EXPORT VC1_2_IRQHandler [WEAK]
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EXPORT LVD_IRQHandler [WEAK]
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EXPORT LCD_IRQHandler [WEAK]
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EXPORT FLASH_RAM_IRQHandler [WEAK]
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EXPORT CLKTRIM_IRQHandler [WEAK]
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PORTA_IRQHandler
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PORTB_IRQHandler
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PORTC_E_IRQHandler
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PORTD_F_IRQHandler
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DMAC_IRQHandler
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TIM3_IRQHandler
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UART0_2_IRQHandler
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UART1_3_IRQHandler
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LPUART0_IRQHandler
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LPUART1_IRQHandler
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SPI0_IRQHandler
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SPI1_IRQHandler
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I2C0_IRQHandler
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I2C1_IRQHandler
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TIM0_IRQHandler
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TIM1_IRQHandler
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TIM2_IRQHandler
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LPTIM0_1_IRQHandler
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TIM4_IRQHandler
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TIM5_IRQHandler
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TIM6_IRQHandler
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PCA_IRQHandler
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WDT_IRQHandler
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RTC_IRQHandler
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ADC_DAC_IRQHandler
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PCNT_IRQHandler
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VC0_IRQHandler
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VC1_2_IRQHandler
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LVD_IRQHandler
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LCD_IRQHandler
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FLASH_RAM_IRQHandler
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CLKTRIM_IRQHandler
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B .
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ENDP
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ALIGN
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; User Initial Stack & Heap
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IF :DEF:__MICROLIB
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EXPORT __initial_sp
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EXPORT __heap_base
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EXPORT __heap_limit
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ELSE
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IMPORT __use_two_region_memory
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EXPORT __user_initial_stackheap
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__user_initial_stackheap
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LDR R0, = Heap_Mem
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LDR R1, =(Stack_Mem + Stack_Size)
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LDR R2, = (Heap_Mem + Heap_Size)
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LDR R3, = Stack_Mem
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BX LR
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ALIGN
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ENDIF
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END
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