312 lines
26 KiB
C
312 lines
26 KiB
C
/*******************************************************************************
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* Copyright (C) 2020, Huada Semiconductor Co., Ltd. All rights reserved.
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*
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* This software component is licensed by HDSC under BSD 3-Clause license
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* (the "License"); You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*/
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/******************************************************************************/
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/** \file sdmmc_cmd.h
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**
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** A detailed description is available at
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** @link SdiocGroup SDIOC description @endlink
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**
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** - 2018-11-15 CDT First version for Device Driver Library of SDIOC.
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**
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******************************************************************************/
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#ifndef __SDMMC_CMD_H__
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#define __SDMMC_CMD_H__
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/*******************************************************************************
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* Include files
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******************************************************************************/
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#include "hc32_ddl.h"
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#include "hc32f460_utility.h"
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/* C binding of definitions if building with C++ compiler */
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/**
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*******************************************************************************
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** \defgroup SdiocGroup Secure Digital Input and Output Controller(SDIOC)
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**
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******************************************************************************/
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//@{
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/*******************************************************************************
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* Global type definitions ('typedef')
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******************************************************************************/
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/**
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*******************************************************************************
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** \brief SD/eMMC/SDIO card status
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**
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******************************************************************************/
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typedef enum en_sdmmc_card_state
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{
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SdmmcCardStateIdle = 0u, ///< Card state: Idle State
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SdmmcCardStateReady = 1u, ///< Card state: Ready State
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SdmmcCardStateIdent = 2u, ///< Card state: Identification State
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SdmmcCardStateStby = 3u, ///< Card state: Stand-by State
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SdmmcCardStateTran = 4u, ///< Card state: Transfer State
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SdmmcCardStateSendData = 5u, ///< Card state: Sending-data State
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SdmmcCardStateRcvData = 6u, ///< Card state: Receive-data State
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SdmmcCardStatePgm = 7u, ///< Card state: Programming State
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SdmmcCardStateDis = 8u, ///< Card state: Disconnect State
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} en_sdmmc_card_state_t;
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/**
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*******************************************************************************
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** \brief SD/eMMC/SDIO card capacity.
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**
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******************************************************************************/
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typedef enum sdmmc_capacity
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{
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SdmmcStanderdCapacity = 0x00000000u, ///< Card capacity: Standard Capacity
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SdmmcHighCapacity = 0x40000000u, ///< Card capacity: High Capacity
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} sdmmc_capacity_t;
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/**
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*******************************************************************************
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** \brief SD/eMMC/SDIO card response data structure.
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**
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******************************************************************************/
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typedef struct stc_sdmmc_resp_card_status
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{
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uint32_t RESERVE1 :3; ///< RESERVE
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uint32_t AKE_SEQ_ERROR :1; ///< Error in the sequence of the authentication process
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uint32_t RESERVE2 :1; ///< RESERVE
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uint32_t APP_CMD :1; ///< The card will expect ACMD, or an indication that the command has been interpreted as ACMD
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uint32_t RESERVE3 :2; ///< RESERVE
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uint32_t READY_FOR_DATA :1; ///< Corresponds to buffer empty signaling on the bus
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uint32_t CURRENT_STATE :4; ///< The state of the card when receiving the command.
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uint32_t ERASE_RESET :1; ///< An erase sequence was cleared before executing because an out of erase sequence command was received
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uint32_t CARD_ECC_DISABLE :1; ///< The command has been executed without using the internal ECC.
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uint32_t WP_ERASE_SKIP :1; ///< Set when only partial address space was erased due to existing write protected blocks or the temporary or permanent write protected card was erased.
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uint32_t CSD_OVERWRITE :1; ///< - The read only section of the CSD does not match the card content.
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///< - An attempt to reverse the copy (set as original) or permanent WP (unprotected) bits was made.
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uint32_t RESERVE4 :2; ///< RESERVE
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uint32_t ERRORR :1; ///< A general or an unknown error occurred during the operation.
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uint32_t CC_ERROR :1; ///< Internal card controller error
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uint32_t CARD_ECC_FAIL :1; ///< Card internal ECC was applied but failed to correct the data.
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uint32_t ILLEGAL_CMD :1; ///< Command not legal for the card state
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uint32_t COM_CRC_ERROR :1; ///< The CRC check of the previous command failed.
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uint32_t LOCK_UNLOCK_FAIL :1; ///< Set when a sequence or password error has been detected in lock/unlock card command.
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uint32_t CARD_IS_LOCKED :1; ///< When set, signals that the card is locked by the host
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uint32_t WP_VIOLATION :1; ///< Set when the host attempts to write to a protected block or to the temporary or permanent write protected card.
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uint32_t ERASE_PARAM :1; ///< An invalid selection of write-blocks for erase occurred.
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uint32_t ERASE_SEQ_ERR :1; ///< An error in the sequence of erase commands occurred.
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uint32_t BLOCK_LEN_ERR :1; ///< The transferred block length is not allowed for this card, or the number of transferred bytes does not match the block length.
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uint32_t ADDRESS_ERROR :1; ///< A misaligned address which did not match the block length was used in the command.
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uint32_t OUT_OF_RANGE :1; ///< The command’s argument was out of the allowed range for this card.
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} stc_sdmmc_resp_card_status_t;
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/*******************************************************************************
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* Global pre-processor symbols/macros ('#define')
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******************************************************************************/
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/**
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*******************************************************************************
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** \brief SDMMC Commands Index
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**
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******************************************************************************/
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#define CMD0_GO_IDLE_STATE (0u) /*!< Resets the SD memory card. */
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#define CMD1_SEND_OP_COND (1u) /*!< Sends host capacity support information and activates the card's initialization process. */
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#define CMD2_ALL_SEND_CID (2u) /*!< Asks any card connected to the host to send the CID numbers on the CMD line. */
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#define CMD3_SEND_RELATIVE_ADDR (3u) /*!< Asks the card to publish a new relative address (RCA). */
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#define CMD_SET_DSR (4u) /*!< Programs the DSR of all cards. */
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#define CMD_SDMMC_SEN_OP_COND (5u) /*!< Sends host capacity support information (HCS) and asks the accessed card to send its
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operating condition register (OCR) content in the response on the CMD line. */
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#define CMD6_SWITCH_FUNC (6u) /*!< Checks switchable function (mode 0) and switch card function (mode 1). */
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#define CMD7_SEL_DESEL_CARD (7u) /*!< Selects the card by its own relative address and gets deselected by any other address */
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#define CMD8_SEND_IF_COND (8u) /*!< Sends SD Memory Card interface condition, which includes host supply voltage information
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and asks the card whether card supports voltage. */
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#define CMD9_SEND_CSD (9u) /*!< Addressed card sends its card specific data (CSD) on the CMD line. */
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#define CMD10_SEND_CID (10u) /*!< Addressed card sends its card identification (CID) on the CMD line. */
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#define CMD11_READ_DAT_UNTIL_STOP (11u) /*!< SD card doesn't support it. */
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#define CMD12_STOP_TRANSMISSION (12u) /*!< Forces the card to stop transmission. */
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#define CMD13_SEND_STATUS (13u) /*!< Addressed card sends its status register. */
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#define CMD14_HS_BUSTEST_READ (14u) /*!< Reserved */
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#define CMD15_GO_INACTIVE_STATE (15u) /*!< Sends an addressed card into the inactive state. */
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#define CMD16_SET_BLOCKLEN (16u) /*!< Sets the block length (in bytes for SDSC) for all following block commands
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(read, write, lock). Default block length is fixed to 512 Bytes. Not effective
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for SDHS and SDXC. */
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#define CMD17_READ_SINGLE_BLOCK (17u) /*!< Reads single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of
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fixed 512 bytes in case of SDHC and SDXC. */
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#define CMD18_READ_MULTIPLE_BLOCK (18u) /*!< Continuously transfers data blocks from card to host until interrupted by
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STOP_TRANSMISSION command. */
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#define CMD19_HS_BUSTEST_WRITE (19u) /*!< 64 bytes tuning pattern is sent for SDR50 and SDR104. */
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#define CMD20_WRITE_DAT_UNTIL_STOP (20u) /*!< Speed class control command. */
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#define CMD23_SET_BLOCK_COUNT (23u) /*!< Specify block count for CMD18 and CMD25. */
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#define CMD24_WRITE_SINGLE_BLOCK (24u) /*!< Writes single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of
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fixed 512 bytes in case of SDHC and SDXC. */
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#define CMD25_WRITE_MULTIPLE_BLOCK (25u) /*!< Continuously writes blocks of data until a STOP_TRANSMISSION follows. */
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#define CMD26_PROG_CID (26u) /*!< Reserved for manufacturers. */
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#define CMD27_PROG_CSD (27u) /*!< Programming of the programmable bits of the CSD. */
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#define CMD28_SET_WRITE_PROT (28u) /*!< Sets the write protection bit of the addressed group. */
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#define CMD29_CLR_WRITE_PROT (29u) /*!< Clears the write protection bit of the addressed group. */
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#define CMD30_SEND_WRITE_PROT (30u) /*!< Asks the card to send the status of the write protection bits. */
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#define CMD32_ERASE_WR_BLK_START (32u) /*!< Sets the address of the first write block to be erased. (For SD card only). */
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#define CMD33_ERASE_WR_BLK_END (33u) /*!< Sets the address of the last write block of the continuous range to be erased. */
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#define CMD35_ERASE_GRP_START (35u) /*!< Sets the address of the first write block to be erased. Reserved for each command
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system set by switch function command (CMD6). */
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#define CMD36_ERASE_GRP_END (36u) /*!< Sets the address of the last write block of the continuous range to be erased.
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Reserved for each command system set by switch function command (CMD6). */
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#define CMD38_ERASE (38u) /*!< Reserved for SD security applications. */
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#define CMD39_FAST_IO (39u) /*!< SD card doesn't support it (Reserved). */
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#define CMD40_GO_IRQ_STATE (40u) /*!< SD card doesn't support it (Reserved). */
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#define CMD42_LOCK_UNLOCK (42u) /*!< Sets/resets the password or lock/unlock the card. The size of the data block is set by
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the SET_BLOCK_LEN command. */
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#define CMD55_APP_CMD (55u) /*!< Indicates to the card that the next command is an application specific command rather
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than a standard command. */
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#define CMD56_GEN_CMD (56u) /*!< Used either to transfer a data block to the card or to get a data block from the card
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for general purpose/application specific commands. */
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#define CMD64_NO_CMD (64u) /*!< No command */
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/**
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*******************************************************************************
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** \brief SDMMC_APP_CMD Commands Index
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**
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******************************************************************************/
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#define ACMD6_APP_SD_SET_BUSWIDTH (6u) /*!< (ACMD6) Defines the data bus width to be used for data transfer. The allowed data bus
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widths are given in SCR register. */
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#define ACMD13_SD_APP_STATUS (13u) /*!< (ACMD13) Sends the SD status. */
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#define ACMD22_SD_APP_SEND_NUM_WRITE_BLOCKS (22u) /*!< (ACMD22) Sends the number of the written (without errors) write blocks. Responds with
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32bit+CRC data block. */
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#define ACMD41_SD_SEND_OP_COND (41u) /*!< (ACMD41) Sends host capacity support information (HCS) and asks the accessed card to
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send its operating condition register (OCR) content in the response on the CMD line. */
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#define ACMD42_SET_CLR_CARD_DETECT (42u) /*!< (ACMD42) Connect/Disconnect the 50 KOhm pull-up resistor on CD/DAT3 (pin 1) of the card */
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#define ACMD51_SD_APP_SEND_SCR (51u) /*!< Reads the SD Configuration Register (SCR). */
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#define ACMD52_RW_DIRECT (52u) /*!< For SD I/O card only, reserved for security specification. */
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#define ACMD53_RW_EXTENDED (53u) /*!< For SD I/O card only, reserved for security specification. */
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/**
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*******************************************************************************
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** \brief SD Card Specific security commands Commands Index
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**
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******************************************************************************/
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#define ACMD43_GET_MKB (43u)
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#define ACMD44_GET_MID (44u)
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#define ACMD45_SET_CER_RN1 (45u)
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#define ACMD46_GET_CER_RN2 (46u)
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#define ACMD47_SET_CER_RES2 (47u)
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#define ACMD48_GET_CER_RES1 (48u)
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#define ACMD18_SECURE_READ_MULTIPLE_BLOCK (18u)
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#define ACMD25_SECURE_WRITE_MULTIPLE_BLOCK (25u)
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#define ACMD38_SECURE_ERASE (38u)
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#define ACMD49_CHANGE_SECURE_AREA (49u)
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#define ACMD48_SECURE_WRITE_MKB (48u)
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/**
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*******************************************************************************
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** \brief Media voltage supported.
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**
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******************************************************************************/
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#define SDMMC_SD_VOLT_1_7 (0x00000010ul) /* Low voltage card minimum */
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#define SDMMC_SD_VOLT_1_8 (0x00000020ul)
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#define SDMMC_SD_VOLT_1_9 (0x00000040ul)
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#define SDMMC_SD_VOLT_2_0 (0x00000080ul)
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#define SDMMC_SD_VOLT_2_1 (0x00000100ul) /* Basic communication minimum */
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#define SDMMC_SD_VOLT_2_2 (0x00000200ul)
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#define SDMMC_SD_VOLT_2_3 (0x00000400ul)
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#define SDMMC_SD_VOLT_2_4 (0x00000800ul)
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#define SDMMC_SD_VOLT_2_5 (0x00001000ul)
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#define SDMMC_SD_VOLT_2_6 (0x00002000ul)
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#define SDMMC_SD_VOLT_2_7 (0x00004000ul)
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#define SDMMC_SD_VOLT_2_8 (0x00008000ul) /* Memory access minimum */
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#define SDMMC_SD_VOLT_2_9 (0x00010000ul)
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#define SDMMC_SD_VOLT_3_0 (0x00020000ul)
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#define SDMMC_SD_VOLT_3_1 (0x00040000ul)
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#define SDMMC_SD_VOLT_3_2 (0x00080000ul)
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#define SDMMC_SD_VOLT_3_3 (0x00100000ul)
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#define SDMMC_SD_VOLT_3_4 (0x00200000ul)
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#define SDMMC_SD_VOLT_3_5 (0x00400000ul)
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#define SDMMC_SD_VOLT_3_6 (0x00800000ul)
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#define SDMMC_ERROR_NONE (0x00000000ul) /*!< No error */
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#define SDMMC_ERROR_CMD_CRC_FAIL (0x00000001ul) /*!< Command response received (but CRC check failed) */
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#define SDMMC_ERROR_DATA_CRC_FAIL (0x00000002ul) /*!< Data block sent/received (CRC check failed) */
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#define SDMMC_ERROR_CMD_RSP_TIMEOUT (0x00000004ul) /*!< Command response timeout */
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#define SDMMC_ERROR_DATA_TIMEOUT (0x00000008ul) /*!< Data timeout */
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#define SDMMC_ERROR_TX_UNDERRUN (0x00000010ul) /*!< Transmit FIFO underrun */
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#define SDMMC_ERROR_RX_OVERRUN (0x00000020ul) /*!< Receive FIFO overrun */
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#define SDMMC_ERROR_ADDR_MISALIGNED (0x00000040ul) /*!< Misaligned address */
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#define SDMMC_ERROR_BLOCK_LEN_ERR (0x00000080ul) /*!< Transferred block length is not allowed for the card or the
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number of transferred bytes does not match the block length */
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#define SDMMC_ERROR_ERASE_SEQ_ERR (0x00000100ul) /*!< An error in the sequence of erase command occurs */
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#define SDMMC_ERROR_BAD_ERASE_PARAM (0x00000200ul) /*!< An invalid selection for erase groups */
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#define SDMMC_ERROR_WRITE_PROT_VIOLATION (0x00000400ul) /*!< Attempt to program a write protect block */
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#define SDMMC_ERROR_LOCK_UNLOCK_FAILED (0x00000800ul) /*!< Sequence or password error has been detected in unlock
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command or if there was an attempt to access a locked card */
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#define SDMMC_ERROR_COM_CRC_FAILED (0x00001000ul) /*!< CRC check of the previous command failed */
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#define SDMMC_ERROR_ILLEGAL_CMD (0x00002000ul) /*!< Command is not legal for the card state */
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#define SDMMC_ERROR_CARD_ECC_FAILED (0x00004000ul) /*!< Card internal ECC was applied but failed to correct the data */
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#define SDMMC_ERROR_CC_ERR (0x00008000ul) /*!< Internal card controller error */
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#define SDMMC_ERROR_GENERAL_UNKNOWN_ERR (0x00010000ul) /*!< General or unknown error */
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#define SDMMC_ERROR_STREAM_READ_UNDERRUN (0x00020000ul) /*!< The card could not sustain data reading in stream rmode */
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#define SDMMC_ERROR_STREAM_WRITE_OVERRUN (0x00040000ul) /*!< The card could not sustain data programming in stream mode */
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#define SDMMC_ERROR_CID_CSD_OVERWRITE (0x00080000ul) /*!< CID/CSD overwrite error */
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#define SDMMC_ERROR_WP_ERASE_SKIP (0x00100000ul) /*!< Only partial address space was erased */
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#define SDMMC_ERROR_CARD_ECC_DISABLED (0x00200000ul) /*!< Command has been executed without using internal ECC */
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#define SDMMC_ERROR_ERASE_RESET (0x00400000ul) /*!< Erase sequence was cleared before executing because an out
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of erase sequence command was received */
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#define SDMMC_ERROR_AKE_SEQ_ERR (0x00800000ul) /*!< Error in sequence of authentication */
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#define SDMMC_ERROR_INVALID_VOLTRANGE (0x01000000ul) /*!< Error in case of invalid voltage range */
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#define SDMMC_ERROR_ADDR_OUT_OF_RANGE (0x02000000ul) /*!< Error when addressed block is out of range */
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#define SDMMC_ERROR_REQUEST_NOT_APPLICABLE (0x04000000ul) /*!< Error when command request is not applicable */
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#define SDMMC_ERROR_INVALID_PARAMETER (0x08000000ul) /*!< the used parameter is not valid */
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#define SDMMC_ERROR_UNSUPPORTED_FEATURE (0x10000000ul) /*!< Error when feature is not insupported */
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#define SDMMC_ERROR_BUSY (0x20000000ul) /*!< Error when transfer process is busy */
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#define SDMMC_ERROR_DMA (0x40000000ul) /*!< Error while DMA transfer */
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#define SDMMC_ERROR_TIMEOUT (0x80000000ul) /*!< Timeout error */
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/*******************************************************************************
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* Global variable definitions ('extern')
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******************************************************************************/
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/*******************************************************************************
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* Global function prototypes (definition in C source)
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******************************************************************************/
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en_result_t SDMMC_Cmd0_GoIdleState(M4_SDIOC_TypeDef *SDIOCx);
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en_result_t SDMMC_Cmd1_SendOpCond(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32Argument, uint32_t *pu32OCR);
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en_result_t SDMMC_Cmd2_AllSendCID(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32CID[4]);
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en_result_t SDMMC_Cmd3_SendRelativeAddr(M4_SDIOC_TypeDef *SDIOCx, uint32_t *pu32RCA);
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en_result_t SDMMC_Cmd6_SwitchFunc(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32Argument, uint32_t *pu32Resp1);
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en_result_t SDMMC_Cmd7_SelectDeselectCard(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32RCA, uint32_t *pu32Resp1);
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en_result_t SDMMC_Cmd8_SendIfCond(M4_SDIOC_TypeDef *SDIOCx, uint32_t *pu32IfCond);
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en_result_t SDMMC_Cmd9_SendCSD(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32RCA, uint32_t u32CSD[4]);
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en_result_t SDMMC_Cmd10_SendCID(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32RCA, uint32_t u32CID[4]);
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en_result_t SDMMC_Cmd12_StopTransmission(M4_SDIOC_TypeDef *SDIOCx, uint32_t *pu32Resp1);
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en_result_t SDMMC_Cmd13_SendStatus(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32RCA, uint32_t *pu32Resp1);
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en_result_t SDMMC_Cmd16_SetBlockLength(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32BlockLen, uint32_t *pu32Resp1);
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en_result_t SDMMC_Cmd17_ReadSingleBlock(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32ReadAddr, uint32_t *pu32Resp1);
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en_result_t SDMMC_Cmd18_ReadMultipleBlock(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32ReadAddr, uint32_t *pu32Resp1);
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en_result_t SDMMC_Cmd24_WriteSingleBlock(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32WriteAddr, uint32_t *pu32Resp1);
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en_result_t SDMMC_Cmd25_WriteMultipleBlock(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32WriteAddr, uint32_t *pu32Resp1);
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en_result_t SDMMC_Cmd32_EraseWrBlkStart(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32StartAddr, uint32_t *pu32Resp1);
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en_result_t SDMMC_Cmd33_EraseWrBlkEnd(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32EndAddr, uint32_t *pu32Resp1);
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en_result_t SDMMC_Cmd35_SetEraseStartAddr(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32StartAddr, uint32_t *pu32Resp1);
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en_result_t SDMMC_Cmd36_SetEraseEndAddr(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32EndAddr, uint32_t *pu32Resp1);
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en_result_t SDMMC_Cmd38_Erase(M4_SDIOC_TypeDef *SDIOCx, uint32_t *pu32Resp1);
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en_result_t SDMMC_Cmd55_AppCmd(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32Argument, uint32_t *pu32Resp1);
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en_result_t SDMMC_Acmd6_SetBusWidth(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32BusWidth, uint32_t *pu32Resp1);
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en_result_t SDMMC_Acmd13_SdStatus(M4_SDIOC_TypeDef *SDIOCx, uint32_t *pu32Resp1);
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en_result_t SDMMC_Acmd41_SdSendOpCond(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32SdType, uint32_t *pu32OCR);
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en_result_t SDMMC_Acmd51_SendSCR(M4_SDIOC_TypeDef *SDIOCx, uint32_t *pu32Resp1);
|
||
|
||
//@} // SdiocGroup
|
||
|
||
#ifdef __cplusplus
|
||
}
|
||
#endif
|
||
|
||
#endif /* __SDMMC_CMD_H__ */
|
||
|
||
/*******************************************************************************
|
||
* EOF (not truncated)
|
||
******************************************************************************/
|