2026-06-22 09:19:00 +08:00
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#include <stdlib.h>
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#include "bsp.h"
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/*****************************************************************************************
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2026-09-01 10:50:53 +08:00
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* System Clock - HRC 16MHz -> MPLL 200MHz (不用外部晶振)
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2026-06-22 09:19:00 +08:00
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****************************************************************************************/
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static void SystemClockConfig(void)
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{
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stc_clk_sysclk_cfg_t stcSysClkCfg;
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stc_clk_mpll_cfg_t stcMpllCfg;
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stc_sram_config_t stcSramConfig;
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MEM_ZERO_STRUCT(stcSysClkCfg);
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MEM_ZERO_STRUCT(stcMpllCfg);
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MEM_ZERO_STRUCT(stcSramConfig);
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/* Set bus clk div. */
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stcSysClkCfg.enHclkDiv = ClkSysclkDiv1;
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stcSysClkCfg.enExclkDiv = ClkSysclkDiv2;
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stcSysClkCfg.enPclk0Div = ClkSysclkDiv1;
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stcSysClkCfg.enPclk1Div = ClkSysclkDiv2;
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stcSysClkCfg.enPclk2Div = ClkSysclkDiv4;
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stcSysClkCfg.enPclk3Div = ClkSysclkDiv4;
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stcSysClkCfg.enPclk4Div = ClkSysclkDiv2;
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CLK_SysClkConfig(&stcSysClkCfg);
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/* sram init include read/write wait cycle setting */
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stcSramConfig.u8SramIdx = Sram12Idx | Sram3Idx | SramHsIdx | SramRetIdx;
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stcSramConfig.enSramRC = SramCycle2;
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stcSramConfig.enSramWC = SramCycle2;
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SRAM_Init(&stcSramConfig);
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/* flash read wait cycle setting */
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EFM_Unlock();
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EFM_SetLatency(EFM_LATENCY_5);
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EFM_Lock();
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2026-09-01 10:50:53 +08:00
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/* Config HRC and enable HRC */
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CLK_HrcCmd(Enable);
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/* MPLL config (HRC / pllmDiv * plln / PllpDiv = 16/2*50/2 = 200M). */
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stcMpllCfg.pllmDiv = 2ul;
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2026-06-22 09:19:00 +08:00
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stcMpllCfg.plln = 50ul;
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stcMpllCfg.PllpDiv = 2ul;
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stcMpllCfg.PllqDiv = 2ul;
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stcMpllCfg.PllrDiv = 2ul;
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2026-09-01 10:50:53 +08:00
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CLK_SetPllSource(ClkPllSrcHRC);
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2026-06-22 09:19:00 +08:00
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CLK_MpllConfig(&stcMpllCfg);
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/* Enable MPLL. */
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CLK_MpllCmd(Enable);
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/* Wait MPLL ready. */
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while(Set != CLK_GetFlagStatus(ClkFlagMPLLRdy))
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{
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;
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}
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/* Switch driver ability */
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PWC_HS2HP();
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/* Switch system clock source to MPLL. */
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CLK_SetSysClkSource(CLKSysSrcMPLL);
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2026-09-01 10:50:53 +08:00
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SystemCoreClockUpdate();
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2026-06-22 09:19:00 +08:00
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}
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/*****************************************************************************************
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2026-09-01 10:50:53 +08:00
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* Debug Uart (USART1)
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2026-06-22 09:19:00 +08:00
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****************************************************************************************/
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static uint8_t DbgUartRec(void)
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{
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uint16_t u16Data = USART_RecData(DBG_USART_CH);
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return (uint8_t)u16Data;
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}
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static void DBGUsartErrIrqCallback(void)
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{
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if(DBG_USART_CH->SR_f.ORE) {
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DBG_USART_CH->CR1_f.CORE = 1;
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USART_RecData(DBG_USART_CH);
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}
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if(DBG_USART_CH->SR_f.PE)
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DBG_USART_CH->CR1_f.CPE = 1;
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if(DBG_USART_CH->SR_f.FE)
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DBG_USART_CH->CR1_f.CFE = 1;
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}
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2026-09-01 10:50:53 +08:00
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static void DBGUsartRxIrqCallback(void)
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2026-06-22 09:19:00 +08:00
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{
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uint8_t rData = DbgUartRec();
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DbgRxIrqCallback(rData);
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}
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void DbgUart_Config(uint32_t BaudRate)
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{
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stc_usart_uart_init_t stcInitCfg;
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stc_irq_regi_conf_t stcIrqRegiCfg;
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en_result_t enRet;
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stc_port_init_t stcPortInit;
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MEM_ZERO_STRUCT(stcPortInit);
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stcPortInit.enPinOType = Pin_OType_Cmos;
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PORT_Init(DBG_USART_RX_PORT, DBG_USART_RX_PIN, &stcPortInit);
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PORT_Init(DBG_USART_TX_PORT, DBG_USART_TX_PIN, &stcPortInit);
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2026-09-01 10:50:53 +08:00
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2026-06-22 09:19:00 +08:00
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stcInitCfg.enClkMode = UsartIntClkCkNoOutput;
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stcInitCfg.enClkDiv = UsartClkDiv_1;
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stcInitCfg.enDataLength = UsartDataBits8;
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stcInitCfg.enDirection = UsartDataLsbFirst;
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stcInitCfg.enStopBit = UsartOneStopBit;
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stcInitCfg.enParity = UsartParityNone;
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stcInitCfg.enSampleMode = UsartSampleBit8;
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stcInitCfg.enDetectMode = UsartStartBitFallEdge;
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stcInitCfg.enHwFlow = UsartRtsEnable;
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2026-09-01 10:50:53 +08:00
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2026-06-22 09:19:00 +08:00
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PWC_Fcg1PeriphClockCmd(DBG_FCG1_PERIPH, Enable);
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2026-09-01 10:50:53 +08:00
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2026-06-22 09:19:00 +08:00
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PORT_SetFunc(DBG_USART_RX_PORT, DBG_USART_RX_PIN, DBG_USART_RX_FUNC, Disable);
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PORT_SetFunc(DBG_USART_TX_PORT, DBG_USART_TX_PIN, DBG_USART_TX_FUNC, Disable);
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2026-09-01 10:50:53 +08:00
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2026-06-22 09:19:00 +08:00
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enRet = USART_UART_Init(DBG_USART_CH, &stcInitCfg);
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if(enRet != Ok) {
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Error_Handler();
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}
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enRet = USART_SetBaudrate(DBG_USART_CH, BaudRate);
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if(enRet != Ok) {
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Error_Handler();
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}
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2026-09-01 10:50:53 +08:00
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2026-06-22 09:19:00 +08:00
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stcIrqRegiCfg.enIRQn = DBGUART_IRQn;
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2026-09-01 10:50:53 +08:00
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stcIrqRegiCfg.pfnCallback = &DBGUsartRxIrqCallback;
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2026-06-22 09:19:00 +08:00
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stcIrqRegiCfg.enIntSrc = DBG_USART_RI_NUM;
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enIrqRegistration(&stcIrqRegiCfg);
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2026-09-01 10:50:53 +08:00
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NVIC_SetPriority(stcIrqRegiCfg.enIRQn, 2);
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2026-06-22 09:19:00 +08:00
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NVIC_ClearPendingIRQ(stcIrqRegiCfg.enIRQn);
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NVIC_EnableIRQ(stcIrqRegiCfg.enIRQn);
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stcIrqRegiCfg.enIRQn = DBGUART_EI_IRQn;
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stcIrqRegiCfg.pfnCallback = &DBGUsartErrIrqCallback;
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stcIrqRegiCfg.enIntSrc = DBG_USART_EI_NUM;
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enIrqRegistration(&stcIrqRegiCfg);
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2026-09-01 10:50:53 +08:00
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NVIC_SetPriority(stcIrqRegiCfg.enIRQn, 2);
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2026-06-22 09:19:00 +08:00
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NVIC_ClearPendingIRQ(stcIrqRegiCfg.enIRQn);
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NVIC_EnableIRQ(stcIrqRegiCfg.enIRQn);
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2026-09-01 10:50:53 +08:00
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USART_FuncCmd(DBG_USART_CH, UsartTx, Enable);
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USART_FuncCmd(DBG_USART_CH, UsartRx, Enable);
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USART_FuncCmd(DBG_USART_CH, UsartRxInt, Enable);
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}
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void DebugUartSend(uint8_t *sData, uint16_t sLen)
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{
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for(int i = 0; i < sLen; i++) {
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USART_SendData(DBG_USART_CH, sData[i]);
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while(USART_GetStatus(DBG_USART_CH, UsartTxComplete) == Reset);
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}
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}
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/*****************************************************************************************
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* RS485 Ch1 (USART2) - 升级通道, 按GateWay APP配置方式
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****************************************************************************************/
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static uint8_t RS485Ch1UartRec(void)
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{
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uint16_t u16Data = USART_RecData(RS485_CH1_USART_CH);
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return (uint8_t)u16Data;
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}
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static void RS485Ch1UsartErrIrqCallback(void)
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{
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if(RS485_CH1_USART_CH->SR_f.ORE) {
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RS485_CH1_USART_CH->CR1_f.CORE = 1;
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USART_RecData(RS485_CH1_USART_CH);
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}
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if(RS485_CH1_USART_CH->SR_f.PE)
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RS485_CH1_USART_CH->CR1_f.CPE = 1;
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if(RS485_CH1_USART_CH->SR_f.FE)
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RS485_CH1_USART_CH->CR1_f.CFE = 1;
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}
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static void RS485Ch1UsartRxIrqCallback(void)
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{
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uint8_t rData = RS485Ch1UartRec();
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RS485Ch1RxIrqCallback(rData);
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}
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void RS485Ch1_Config(uint32_t BaudRate)
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{
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stc_usart_uart_init_t stcInitCfg;
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stc_irq_regi_conf_t stcIrqRegiCfg;
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en_result_t enRet;
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stc_port_init_t stcPortInit;
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MEM_ZERO_STRUCT(stcPortInit);
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stcPortInit.enPinOType = Pin_OType_Cmos;
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PORT_Init(RS485_CH1_USART_RX_PORT, RS485_CH1_USART_RX_PIN, &stcPortInit);
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PORT_Init(RS485_CH1_USART_TX_PORT, RS485_CH1_USART_TX_PIN, &stcPortInit);
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stcInitCfg.enClkMode = UsartIntClkCkNoOutput;
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stcInitCfg.enClkDiv = UsartClkDiv_16;
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stcInitCfg.enDataLength = UsartDataBits8;
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stcInitCfg.enDirection = UsartDataLsbFirst;
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stcInitCfg.enStopBit = UsartOneStopBit;
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stcInitCfg.enParity = UsartParityNone;
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stcInitCfg.enSampleMode = UsartSampleBit8;
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stcInitCfg.enDetectMode = UsartStartBitFallEdge;
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stcInitCfg.enHwFlow = UsartRtsEnable;
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PWC_Fcg1PeriphClockCmd(RS485_CH1_FCG1_PERIPH, Enable);
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PORT_SetFunc(RS485_CH1_USART_RX_PORT, RS485_CH1_USART_RX_PIN, RS485_CH1_USART_RX_FUNC, Disable);
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PORT_SetFunc(RS485_CH1_USART_TX_PORT, RS485_CH1_USART_TX_PIN, RS485_CH1_USART_TX_FUNC, Disable);
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enRet = USART_UART_Init(RS485_CH1_USART_CH, &stcInitCfg);
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if(enRet != Ok) {
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Error_Handler();
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}
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enRet = USART_SetBaudrate(RS485_CH1_USART_CH, BaudRate);
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if(enRet != Ok) {
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Error_Handler();
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}
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stcIrqRegiCfg.enIRQn = RS485CH1_UART_IRQn;
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stcIrqRegiCfg.pfnCallback = &RS485Ch1UsartRxIrqCallback;
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stcIrqRegiCfg.enIntSrc = RS485_CH1_USART_RI_NUM;
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2026-06-22 09:19:00 +08:00
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enIrqRegistration(&stcIrqRegiCfg);
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2026-09-01 10:50:53 +08:00
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NVIC_SetPriority(stcIrqRegiCfg.enIRQn, 2);
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2026-06-22 09:19:00 +08:00
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NVIC_ClearPendingIRQ(stcIrqRegiCfg.enIRQn);
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NVIC_EnableIRQ(stcIrqRegiCfg.enIRQn);
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2026-09-01 10:50:53 +08:00
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stcIrqRegiCfg.enIRQn = RS485CH1_UART_EI_IRQn;
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stcIrqRegiCfg.pfnCallback = &RS485Ch1UsartErrIrqCallback;
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stcIrqRegiCfg.enIntSrc = RS485_CH1_USART_EI_NUM;
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2026-06-22 09:19:00 +08:00
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enIrqRegistration(&stcIrqRegiCfg);
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2026-09-01 10:50:53 +08:00
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NVIC_SetPriority(stcIrqRegiCfg.enIRQn, 2);
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2026-06-22 09:19:00 +08:00
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NVIC_ClearPendingIRQ(stcIrqRegiCfg.enIRQn);
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NVIC_EnableIRQ(stcIrqRegiCfg.enIRQn);
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2026-09-01 10:50:53 +08:00
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USART_FuncCmd(RS485_CH1_USART_CH, UsartTx, Enable);
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USART_FuncCmd(RS485_CH1_USART_CH, UsartRx, Enable);
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USART_FuncCmd(RS485_CH1_USART_CH, UsartRxInt, Enable);
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}
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void RS485Ch1UartSend(uint8_t *sData, uint16_t sLen)
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{
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RS485_CH1_TX();
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for(int i = 0; i < sLen; i++) {
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USART_SendData(RS485_CH1_USART_CH, sData[i]);
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while(USART_GetStatus(RS485_CH1_USART_CH, UsartTxComplete) == Reset);
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}
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RS485_CH1_RX();
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2026-06-22 09:19:00 +08:00
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}
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/*****************************************************************************************
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2026-09-01 10:50:53 +08:00
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* RS485 Ch2 (USART3)
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****************************************************************************************/
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static uint8_t RS485Ch2UartRec(void)
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{
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uint16_t u16Data = USART_RecData(RS485_CH2_USART_CH);
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return (uint8_t)u16Data;
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}
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static void RS485Ch2UsartErrIrqCallback(void)
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{
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if(RS485_CH2_USART_CH->SR_f.ORE) {
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RS485_CH2_USART_CH->CR1_f.CORE = 1;
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USART_RecData(RS485_CH2_USART_CH);
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}
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if(RS485_CH2_USART_CH->SR_f.PE)
|
|
|
|
|
RS485_CH2_USART_CH->CR1_f.CPE = 1;
|
|
|
|
|
if(RS485_CH2_USART_CH->SR_f.FE)
|
|
|
|
|
RS485_CH2_USART_CH->CR1_f.CFE = 1;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void RS485Ch2UsartRxIrqCallback(void)
|
2026-06-22 09:19:00 +08:00
|
|
|
{
|
2026-09-01 10:50:53 +08:00
|
|
|
uint8_t rData = RS485Ch2UartRec();
|
|
|
|
|
RS485Ch2RxIrqCallback(rData);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void RS485Ch2_Config(uint32_t BaudRate)
|
|
|
|
|
{
|
|
|
|
|
stc_usart_uart_init_t stcInitCfg;
|
|
|
|
|
stc_irq_regi_conf_t stcIrqRegiCfg;
|
|
|
|
|
en_result_t enRet;
|
|
|
|
|
stc_port_init_t stcPortInit;
|
|
|
|
|
|
|
|
|
|
MEM_ZERO_STRUCT(stcPortInit);
|
|
|
|
|
stcPortInit.enPinOType = Pin_OType_Cmos;
|
|
|
|
|
PORT_Init(RS485_CH2_USART_RX_PORT, RS485_CH2_USART_RX_PIN, &stcPortInit);
|
|
|
|
|
PORT_Init(RS485_CH2_USART_TX_PORT, RS485_CH2_USART_TX_PIN, &stcPortInit);
|
|
|
|
|
|
|
|
|
|
stcInitCfg.enClkMode = UsartIntClkCkNoOutput;
|
|
|
|
|
stcInitCfg.enClkDiv = UsartClkDiv_16;
|
|
|
|
|
stcInitCfg.enDataLength = UsartDataBits8;
|
|
|
|
|
stcInitCfg.enDirection = UsartDataLsbFirst;
|
|
|
|
|
stcInitCfg.enStopBit = UsartOneStopBit;
|
|
|
|
|
stcInitCfg.enParity = UsartParityNone;
|
|
|
|
|
stcInitCfg.enSampleMode = UsartSampleBit8;
|
|
|
|
|
stcInitCfg.enDetectMode = UsartStartBitFallEdge;
|
|
|
|
|
stcInitCfg.enHwFlow = UsartRtsEnable;
|
|
|
|
|
|
|
|
|
|
PWC_Fcg1PeriphClockCmd(RS485_CH2_FCG1_PERIPH, Enable);
|
|
|
|
|
|
|
|
|
|
PORT_SetFunc(RS485_CH2_USART_RX_PORT, RS485_CH2_USART_RX_PIN, RS485_CH2_USART_RX_FUNC, Disable);
|
|
|
|
|
PORT_SetFunc(RS485_CH2_USART_TX_PORT, RS485_CH2_USART_TX_PIN, RS485_CH2_USART_TX_FUNC, Disable);
|
|
|
|
|
|
|
|
|
|
enRet = USART_UART_Init(RS485_CH2_USART_CH, &stcInitCfg);
|
|
|
|
|
if(enRet != Ok) {
|
|
|
|
|
Error_Handler();
|
|
|
|
|
}
|
|
|
|
|
enRet = USART_SetBaudrate(RS485_CH2_USART_CH, BaudRate);
|
|
|
|
|
if(enRet != Ok) {
|
|
|
|
|
Error_Handler();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
stcIrqRegiCfg.enIRQn = RS485CH2_UART_IRQn;
|
|
|
|
|
stcIrqRegiCfg.pfnCallback = &RS485Ch2UsartRxIrqCallback;
|
|
|
|
|
stcIrqRegiCfg.enIntSrc = RS485_CH2_USART_RI_NUM;
|
|
|
|
|
enIrqRegistration(&stcIrqRegiCfg);
|
|
|
|
|
NVIC_SetPriority(stcIrqRegiCfg.enIRQn, 2);
|
|
|
|
|
NVIC_ClearPendingIRQ(stcIrqRegiCfg.enIRQn);
|
|
|
|
|
NVIC_EnableIRQ(stcIrqRegiCfg.enIRQn);
|
|
|
|
|
|
|
|
|
|
stcIrqRegiCfg.enIRQn = RS485CH2_UART_EI_IRQn;
|
|
|
|
|
stcIrqRegiCfg.pfnCallback = &RS485Ch2UsartErrIrqCallback;
|
|
|
|
|
stcIrqRegiCfg.enIntSrc = RS485_CH2_USART_EI_NUM;
|
|
|
|
|
enIrqRegistration(&stcIrqRegiCfg);
|
|
|
|
|
NVIC_SetPriority(stcIrqRegiCfg.enIRQn, 2);
|
|
|
|
|
NVIC_ClearPendingIRQ(stcIrqRegiCfg.enIRQn);
|
|
|
|
|
NVIC_EnableIRQ(stcIrqRegiCfg.enIRQn);
|
|
|
|
|
|
|
|
|
|
USART_FuncCmd(RS485_CH2_USART_CH, UsartTx, Enable);
|
|
|
|
|
USART_FuncCmd(RS485_CH2_USART_CH, UsartRx, Enable);
|
|
|
|
|
USART_FuncCmd(RS485_CH2_USART_CH, UsartRxInt, Enable);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void RS485Ch2UartSend(uint8_t *sData, uint16_t sLen)
|
|
|
|
|
{
|
|
|
|
|
RS485_CH2_TX();
|
2026-06-22 09:19:00 +08:00
|
|
|
for(int i = 0; i < sLen; i++) {
|
2026-09-01 10:50:53 +08:00
|
|
|
USART_SendData(RS485_CH2_USART_CH, sData[i]);
|
|
|
|
|
while(USART_GetStatus(RS485_CH2_USART_CH, UsartTxComplete) == Reset);
|
2026-06-22 09:19:00 +08:00
|
|
|
}
|
2026-09-01 10:50:53 +08:00
|
|
|
RS485_CH2_RX();
|
2026-06-22 09:19:00 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*****************************************************************************************
|
2026-09-01 10:50:53 +08:00
|
|
|
* GPIO - RS485收发控制引脚 (PC7=Ch1方向, PB13=Ch2方向), PC10供电不动
|
|
|
|
|
****************************************************************************************/
|
2026-06-22 09:19:00 +08:00
|
|
|
static void GPIO_Config(void)
|
|
|
|
|
{
|
|
|
|
|
stc_port_init_t stcPortInit;
|
|
|
|
|
stc_port_pub_set_t stcPortPub;
|
2026-09-01 10:50:53 +08:00
|
|
|
|
2026-06-22 09:19:00 +08:00
|
|
|
PORT_DebugPortSetting(TDO_SWO, Disable);
|
|
|
|
|
PORT_DebugPortSetting(TDI, Disable);
|
|
|
|
|
PORT_DebugPortSetting(TRST, Disable);
|
2026-09-01 10:50:53 +08:00
|
|
|
|
2026-06-22 09:19:00 +08:00
|
|
|
MEM_ZERO_STRUCT(stcPortInit);
|
|
|
|
|
MEM_ZERO_STRUCT(stcPortPub);
|
2026-09-01 10:50:53 +08:00
|
|
|
|
2026-06-22 09:19:00 +08:00
|
|
|
stcPortPub.enReadWait = WaitCycle3;
|
|
|
|
|
PORT_PubSetting(&stcPortPub);
|
2026-09-01 10:50:53 +08:00
|
|
|
|
2026-06-22 09:19:00 +08:00
|
|
|
stcPortInit.enPinMode = Pin_Mode_Out;
|
|
|
|
|
stcPortInit.enPinOType = Pin_OType_Cmos;
|
|
|
|
|
stcPortInit.enPinDrv = Pin_Drv_H;
|
|
|
|
|
stcPortInit.enPullUp = Disable;
|
2026-09-01 10:50:53 +08:00
|
|
|
|
|
|
|
|
/* RS485 Ch1 方向控制 PC7: 高=发送, 低=接收 */
|
|
|
|
|
PORT_Init(RS485_CH1_CTRL_PORT, RS485_CH1_CTRL_PIN, &stcPortInit);
|
|
|
|
|
RS485_CH1_RX();
|
|
|
|
|
|
|
|
|
|
/* RS485 Ch2 方向控制 PB13 */
|
|
|
|
|
PORT_Init(RS485_CH2_CTRL_PORT, RS485_CH2_CTRL_PIN, &stcPortInit);
|
|
|
|
|
RS485_CH2_RX();
|
2026-06-22 09:19:00 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void Error_Handler(void)
|
|
|
|
|
{
|
|
|
|
|
while(1){ ; }
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*****************************************************************************************
|
2026-09-01 10:50:53 +08:00
|
|
|
* Watch Dog - HC32F460 SWDT由ICG硬件启动, 周期喂狗
|
2026-06-22 09:19:00 +08:00
|
|
|
****************************************************************************************/
|
|
|
|
|
void FeedDog(void)
|
|
|
|
|
{
|
2026-09-01 10:50:53 +08:00
|
|
|
#if (WATCH_DOG == 1)
|
2026-06-22 09:19:00 +08:00
|
|
|
SWDT_RefreshCounter();
|
2026-09-01 10:50:53 +08:00
|
|
|
#endif
|
2026-06-22 09:19:00 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void BSP_Init(void)
|
|
|
|
|
{
|
|
|
|
|
SystemClockConfig();
|
|
|
|
|
GPIO_Config();
|
2026-09-01 10:50:53 +08:00
|
|
|
RS485Ch1_Config(500000);
|
2026-06-22 09:19:00 +08:00
|
|
|
|
|
|
|
|
FeedDog();
|
|
|
|
|
SysTick_Init(1000);
|
|
|
|
|
FeedDog();
|
|
|
|
|
}
|
|
|
|
|
|
2026-09-01 10:50:53 +08:00
|
|
|
/*****************************************************************************************
|
|
|
|
|
* Flash操作
|
|
|
|
|
****************************************************************************************/
|
2026-06-22 09:19:00 +08:00
|
|
|
void FlashWrite(uint32_t Addr, uint32_t *wData, uint8_t wLen)
|
|
|
|
|
{
|
|
|
|
|
EFM_Unlock();
|
|
|
|
|
EFM_FlashCmd(Enable);
|
|
|
|
|
while(Set != EFM_GetFlagStatus(EFM_FLAG_RDY)) { ; }
|
|
|
|
|
for(int i = 0; i < wLen; i++) {
|
2026-09-01 10:50:53 +08:00
|
|
|
if(EFM_SingleProgram(Addr + i * 4, wData[i]) != Ok) {
|
|
|
|
|
break;
|
|
|
|
|
}
|
2026-06-22 09:19:00 +08:00
|
|
|
}
|
|
|
|
|
EFM_Lock();
|
|
|
|
|
}
|
|
|
|
|
|
2026-09-01 10:50:53 +08:00
|
|
|
static void FlashRead(uint32_t u32Addr, uint32_t *rData, uint8_t rLen)
|
2026-06-22 09:19:00 +08:00
|
|
|
{
|
|
|
|
|
for(int i = 0; i < rLen / 4; i++) {
|
|
|
|
|
rData[i] = *((volatile uint32_t*)(u32Addr + i * 4));
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void ReadBootPara(BootPara rData)
|
|
|
|
|
{
|
2026-09-01 10:50:53 +08:00
|
|
|
FlashRead(BOOT_PARA_ADDRESS, (uint32_t *)rData, sizeof(BootPara_t));
|
2026-06-22 09:19:00 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void WriteBootPara(BootPara wData)
|
|
|
|
|
{
|
|
|
|
|
int wLen;
|
|
|
|
|
uint32_t *Data;
|
2026-09-01 10:50:53 +08:00
|
|
|
|
2026-06-22 09:19:00 +08:00
|
|
|
Data = (uint32_t *)wData;
|
|
|
|
|
wLen = sizeof(BootPara_t) / 4;
|
|
|
|
|
EFM_Unlock();
|
|
|
|
|
EFM_FlashCmd(Enable);
|
|
|
|
|
while(Set != EFM_GetFlagStatus(EFM_FLAG_RDY)) { ; }
|
|
|
|
|
|
|
|
|
|
/* Erase sector. */
|
|
|
|
|
EFM_SectorErase(BOOT_PARA_ADDRESS);
|
2026-09-01 10:50:53 +08:00
|
|
|
|
2026-06-22 09:19:00 +08:00
|
|
|
for(int i = 0; i < wLen; i++) {
|
2026-09-01 10:50:53 +08:00
|
|
|
if(EFM_SingleProgram(BOOT_PARA_ADDRESS + i * 4, Data[i]) != Ok) {
|
|
|
|
|
break;
|
|
|
|
|
}
|
2026-06-22 09:19:00 +08:00
|
|
|
}
|
|
|
|
|
EFM_Lock();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void EraseFlash(void)
|
|
|
|
|
{
|
|
|
|
|
EFM_Unlock();
|
|
|
|
|
EFM_FlashCmd(Enable);
|
|
|
|
|
while(Set != EFM_GetFlagStatus(EFM_FLAG_RDY)) { ; }
|
2026-09-01 10:50:53 +08:00
|
|
|
|
|
|
|
|
/* 只擦APP区, 不擦参数区(BOOT_PARA_ADDRESS) */
|
|
|
|
|
for(int Addr = APP_ADDRESS; Addr < BOOT_PARA_ADDRESS; Addr += FLASH_SECTOR_SIZE) {
|
2026-06-22 09:19:00 +08:00
|
|
|
EFM_SectorErase(Addr);
|
2026-09-01 10:50:53 +08:00
|
|
|
FeedDog();
|
2026-06-22 09:19:00 +08:00
|
|
|
}
|
|
|
|
|
EFM_Lock();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*****************************************************************************************
|
2026-09-01 10:50:53 +08:00
|
|
|
* User Irq CallBack (weak)
|
2026-06-22 09:19:00 +08:00
|
|
|
****************************************************************************************/
|
|
|
|
|
__weak void DbgRxIrqCallback(uint8_t rData)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
__weak void RS485Ch1RxIrqCallback(uint8_t rData)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
__weak void RS485Ch2RxIrqCallback(uint8_t rData)
|
|
|
|
|
{
|
|
|
|
|
}
|
2026-09-01 10:50:53 +08:00
|
|
|
|
|
|
|
|
|