2026-06-22 09:19:00 +08:00
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#ifndef __BSP_H
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#define __BSP_H
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#include <stdint.h>
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#include <stdbool.h>
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#include <stdio.h>
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#include <string.h>
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#include "hc32_ddl.h"
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2026-09-01 10:50:53 +08:00
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/*版本信息枚举 - 对应Mac[0]的Bit[6:0], Bit[7]固定为1*/
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typedef enum {
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GATEWAY_VER1_0 = 0x01, //网关Ver1.0
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GATEWAY_VER2_0 = 0x02, //网关Ver2.0
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}GATEWAY_VER_M;
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2026-06-22 09:19:00 +08:00
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2026-09-01 10:50:53 +08:00
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/*项目编号枚举 - 对应Mac[1:3](3字节)*/
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2026-06-22 09:19:00 +08:00
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typedef enum {
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2026-09-01 10:50:53 +08:00
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GATEWAY_PRJ_TEST = 0, //测试项目
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GATEWAY_PRJ_AKY, //安科院项目
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GATEWAY_PRJ_BJTU, //北交大项目
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GATEWAY_PRJ_BALADIAN, //巴拉水电边坡监测项目
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GATEWAY_PRJ_TYY1, //铁一院川藏铁路隧道监测项目
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GATEWAY_PRJ_TYY2, //铁二院川藏铁路隧道监测项目
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GATEWAY_PRJ_YAXIA, //雅下项目
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GATEWAY_PRJ_OTHER, //…………
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}GATEWAY_PRJ_M;
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/*通道枚举 - 与GateWay APP一致*/
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2026-06-22 09:19:00 +08:00
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typedef enum {
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2026-09-01 10:50:53 +08:00
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CH_NULL = -1,
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CH_DBG = 0,
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CH_RS485_1,
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CH_RS485_2,
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CH_ETH,
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CH_LORA,
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CH_CAT1,
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}Channel_m;
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2026-09-02 10:02:50 +08:00
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/*Lora频率：470100000ul + 500000*N，N=0~45，共46个信道(470.1MHz~492.6MHz)，用于配置Lora频率更方便*/
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2026-06-22 09:19:00 +08:00
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typedef enum {
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2026-09-02 10:02:50 +08:00
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CH0 = (470100000ul + 0), //470.1MHz
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CH1 = (470100000ul + 500000),
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CH2 = (470100000ul + 1000000),
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CH3 = (470100000ul + 1500000),
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CH4 = (470100000ul + 2000000),
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CH5 = (470100000ul + 2500000),
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CH6 = (470100000ul + 3000000),
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CH7 = (470100000ul + 3500000),
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CH8 = (470100000ul + 4000000),
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CH9 = (470100000ul + 4500000),
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CH10 = (470100000ul + 5000000),
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CH11 = (470100000ul + 5500000),
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CH12 = (470100000ul + 6000000),
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CH13 = (470100000ul + 6500000),
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CH14 = (470100000ul + 7000000),
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CH15 = (470100000ul + 7500000),
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CH16 = (470100000ul + 8000000),
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CH17 = (470100000ul + 8500000),
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CH18 = (470100000ul + 9000000),
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CH19 = (470100000ul + 9500000),
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CH20 = (470100000ul + 10000000),
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CH21 = (470100000ul + 10500000),
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CH22 = (470100000ul + 11000000),
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CH23 = (470100000ul + 11500000),
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CH24 = (470100000ul + 12000000),
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CH25 = (470100000ul + 12500000),
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CH26 = (470100000ul + 13000000),
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CH27 = (470100000ul + 13500000),
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CH28 = (470100000ul + 14000000),
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CH29 = (470100000ul + 14500000),
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CH30 = (470100000ul + 15000000),
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CH31 = (470100000ul + 15500000),
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CH32 = (470100000ul + 16000000),
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CH33 = (470100000ul + 16500000),
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CH34 = (470100000ul + 17000000),
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CH35 = (470100000ul + 17500000),
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CH36 = (470100000ul + 18000000),
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CH37 = (470100000ul + 18500000),
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CH38 = (470100000ul + 19000000),
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CH39 = (470100000ul + 19500000),
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CH40 = (470100000ul + 20000000),
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CH41 = (470100000ul + 20500000),
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CH42 = (470100000ul + 21000000),
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CH43 = (470100000ul + 21500000),
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CH44 = (470100000ul + 22000000),
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CH45 = (470100000ul + 22500000), //492.6MHz
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2026-06-22 09:19:00 +08:00
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}LORA_FREQ_M;
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2026-09-02 10:25:20 +08:00
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/*通讯单元通道掩码 - 与GateWay APP一致*/
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#define CUCH_CH1 (1 << CH_RS485_1)
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#define CUCH_CH2 (1 << CH_RS485_2)
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#define CUCH_ETH (1 << CH_ETH)
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#define CUCH_LORA (1 << CH_LORA)
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#define CUCH_CAT1 (1 << CH_CAT1)
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2026-09-02 10:25:20 +08:00
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/*****************************************************************************************/
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/*********************************下载前必须检查配置项************************************/
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2026-09-01 10:50:53 +08:00
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/*当前设备版本/项目选择*/
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#define GATEWAY_VER_INFO GATEWAY_VER1_0 //版本信息
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#define GATEWAY_PRJ_NUM GATEWAY_PRJ_YAXIA //项目编号
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#define GATEWAY_GW_NUM 0x0000 //网关编号(2字节, 1~65535)
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2026-06-22 09:19:00 +08:00
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2026-09-01 11:14:37 +08:00
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/*CAT1服务器/Lora配置 - 替代原MAC_ADDR_TYPE编译宏, 在Boot中直接配置*/
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2026-09-01 10:50:53 +08:00
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#define GATEWAY_SVR_ADDR0 39 //服务器IP[0]
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#define GATEWAY_SVR_ADDR1 106 //服务器IP[1]
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#define GATEWAY_SVR_ADDR2 103 //服务器IP[2]
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#define GATEWAY_SVR_ADDR3 147 //服务器IP[3]
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#define GATEWAY_SVR_PORT 8080 //服务器端口
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2026-09-02 10:25:20 +08:00
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#define GATEWAY_LORA_FREQ CH0 //Lora中心频率(可配置为CH0~CH45)
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2026-09-01 10:50:53 +08:00
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/*默认通道配置 - 在Boot中直接配置, 替代原APP硬编码默认值*/
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#define GATEWAY_MUCH CH_ETH //主上传通道
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#define GATEWAY_AUCH CH_NULL //辅助上传通道
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#define GATEWAY_DUCH CH_CAT1 //调试/升级通道
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#define GATEWAY_CUCH_MASK CUCH_LORA //通讯单元通道掩码
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2026-09-02 10:25:20 +08:00
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/*********************************下载前必须检查配置项************************************/
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/*****************************************************************************************/
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2026-06-22 09:19:00 +08:00
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2026-09-01 10:50:53 +08:00
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/*Flash分区 - 32KB Boot + APP(0x8000起) + 参数区(0x7C000)*/
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#define FLASH_SECTOR_SIZE 0x2000ul //8KB
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#define FLASH_BASE ((uint32_t)0x00000000)
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#define FLASH_SIZE (64u * FLASH_SECTOR_SIZE) //512KB
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2026-09-01 10:50:53 +08:00
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#define SRAM_BASE ((uint32_t)0x1FFF8000)
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#define SRAM_SIZE 0x2F000ul //192KB
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2026-09-01 10:50:53 +08:00
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#define BOOT_SIZE (4 * FLASH_SECTOR_SIZE) //32KB
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#define APP_ADDRESS (FLASH_BASE + BOOT_SIZE) //0x8000
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#define APP_SIZE (58 * FLASH_SECTOR_SIZE) //464KB
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#define BOOT_PARA_ADDRESS (APP_ADDRESS + APP_SIZE) //0x7C000
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#define BOOT_PARA_SIZE (FLASH_SECTOR_SIZE)
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2026-06-22 09:19:00 +08:00
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#define DEBUG 1
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#define USE_SD_CARD 0
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#define WATCH_DOG 1
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2026-09-01 10:50:53 +08:00
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//DEBUG USART1
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2026-06-22 09:19:00 +08:00
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#define DBGUART_IRQn Int006_IRQn
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#define DBGUART_EI_IRQn Int007_IRQn
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#define DBG_USART_CH (M4_USART1)
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#define DBG_USART_RX_PORT (PortA)
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#define DBG_USART_RX_PIN (Pin11)
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#define DBG_USART_TX_PORT (PortA)
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#define DBG_USART_TX_PIN (Pin12)
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#define DBG_USART_RX_FUNC (Func_Usart1_Rx)
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#define DBG_USART_TX_FUNC (Func_Usart1_Tx)
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#define DBG_USART_RI_NUM (INT_USART1_RI)
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#define DBG_USART_EI_NUM (INT_USART1_EI)
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#define DBG_FCG1_PERIPH (PWC_FCG1_PERIPH_USART1)
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2026-09-01 10:50:53 +08:00
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//RS485 Ch1 USART2 - 升级通道
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2026-06-22 09:19:00 +08:00
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#define RS485_CH1_USART_CH (M4_USART2)
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#define RS485_CH1_USART_RX_PORT (PortA)
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#define RS485_CH1_USART_RX_PIN (Pin10)
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#define RS485_CH1_USART_TX_PORT (PortA)
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#define RS485_CH1_USART_TX_PIN (Pin08)
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#define RS485_CH1_USART_RX_FUNC (Func_Usart2_Rx)
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#define RS485_CH1_USART_TX_FUNC (Func_Usart2_Tx)
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#define RS485_CH1_USART_RI_NUM (INT_USART2_RI)
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#define RS485_CH1_USART_EI_NUM (INT_USART2_EI)
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#define RS485_CH1_FCG1_PERIPH (PWC_FCG1_PERIPH_USART2)
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2026-09-01 10:50:53 +08:00
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#define RS485CH1_UART_IRQn Int012_IRQn
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#define RS485CH1_UART_EI_IRQn Int011_IRQn
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2026-06-22 09:19:00 +08:00
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#define RS485_CH1_CTRL_PORT (PortC)
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#define RS485_CH1_CTRL_PIN (Pin07)
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#define RS485_CH1_TX() PORT_SetBits(RS485_CH1_CTRL_PORT, RS485_CH1_CTRL_PIN)
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#define RS485_CH1_RX() PORT_ResetBits(RS485_CH1_CTRL_PORT, RS485_CH1_CTRL_PIN)
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2026-09-01 10:50:53 +08:00
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//RS485 Ch2 USART3
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2026-06-22 09:19:00 +08:00
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#define RS485_CH2_USART_CH (M4_USART3)
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#define RS485_CH2_USART_RX_PORT (PortB)
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#define RS485_CH2_USART_RX_PIN (Pin14)
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#define RS485_CH2_USART_TX_PORT (PortB)
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#define RS485_CH2_USART_TX_PIN (Pin12)
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#define RS485_CH2_USART_RX_FUNC (Func_Usart3_Rx)
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#define RS485_CH2_USART_TX_FUNC (Func_Usart3_Tx)
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#define RS485_CH2_USART_RI_NUM (INT_USART3_RI)
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#define RS485_CH2_USART_EI_NUM (INT_USART3_EI)
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#define RS485_CH2_FCG1_PERIPH (PWC_FCG1_PERIPH_USART3)
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2026-09-01 10:50:53 +08:00
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#define RS485CH2_UART_IRQn Int002_IRQn
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#define RS485CH2_UART_EI_IRQn Int003_IRQn
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2026-06-22 09:19:00 +08:00
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#define RS485_CH2_CTRL_PORT (PortB)
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#define RS485_CH2_CTRL_PIN (Pin13)
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#define RS485_CH2_TX() PORT_SetBits(RS485_CH2_CTRL_PORT, RS485_CH2_CTRL_PIN)
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#define RS485_CH2_RX() PORT_ResetBits(RS485_CH2_CTRL_PORT, RS485_CH2_CTRL_PIN)
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2026-09-01 10:50:53 +08:00
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/*BootLoader参数结构体 - 与GateWay APP一致*/
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2026-06-22 09:19:00 +08:00
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typedef struct {
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2026-09-01 10:50:53 +08:00
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uint32_t AppFlag; //应用启动标志
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uint32_t UpdateFlag; //升级标志
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uint32_t PackageCnt; //数据包总数
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uint32_t AppSize; //应用程序大小
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uint32_t Crc32Check; //CRC32校验值
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uint32_t FirstRunFlag; //首次运行标志
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uint8_t GwMac[6]; //网关MAC地址
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uint8_t SvrAddr[4]; //默认服务器IP地址
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uint16_t SvrPort; //默认服务器端口
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uint32_t LoraFreq; //默认Lora中心频率
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int8_t Much; //主上传通道
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int8_t Auch; //辅助上传通道
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int8_t Duch; //调试/升级通道
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uint8_t CuchMask; //通讯单元通道掩码
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2026-06-22 09:19:00 +08:00
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}BootPara_t, *BootPara;
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2026-09-01 10:50:53 +08:00
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/*BSP初始化*/
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2026-06-22 09:19:00 +08:00
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void BSP_Init(void);
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2026-09-01 10:50:53 +08:00
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/*调试串口*/
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2026-06-22 09:19:00 +08:00
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void DbgUart_Config(uint32_t BaudRate);
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void DebugUartSend(uint8_t *sData, uint16_t sLen);
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void DbgRxIrqCallback(uint8_t rData);
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2026-09-01 10:50:53 +08:00
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/*RS485 Ch1 - 升级通道*/
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void RS485Ch1_Config(uint32_t BaudRate);
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void RS485Ch1UartSend(uint8_t *sData, uint16_t sLen);
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uint8_t RS485Ch1UartRec(void);
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void RS485Ch1RxIrqCallback(uint8_t rData);
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/*RS485 Ch2*/
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void RS485Ch2_Config(uint32_t BaudRate);
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void RS485Ch2UartSend(uint8_t *sData, uint16_t sLen);
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void RS485Ch2RxIrqCallback(uint8_t rData);
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/*看门狗*/
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2026-06-22 09:19:00 +08:00
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void FeedDog(void);
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void Error_Handler(void);
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2026-09-01 10:50:53 +08:00
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/*Flash操作*/
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2026-06-22 09:19:00 +08:00
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void FlashWrite(uint32_t Addr, uint32_t *wData, uint8_t wLen);
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void ReadBootPara(BootPara rData);
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void WriteBootPara(BootPara wData);
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void EraseFlash(void);
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2026-09-01 10:50:53 +08:00
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2026-06-22 09:19:00 +08:00
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#endif
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2026-09-01 10:50:53 +08:00
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