3 Commits

Author SHA1 Message Date
YuanHongbin b1cba74aa7 feat(app): 配合Boot A/B分区升级, 链接区限定A区232KB
bsp.h分区宏改A区29扇区+新增B区宏(FLASH_BINFO_BASE仍=0x7C000); GateWay_app.sct IROM 0x74000→0x3A000;
Update()增加AppSize<=FLASH_APPB_SIZE校验, 超限拒绝不置标志不复位
2026-09-23 11:16:55 +08:00
YuanHongbin 2cf17c4387 fix(stack): 增大Lora/LoraIRQ线程栈至2048并启用栈溢出检测
0x0020类型设备数据含float字段,DebugDisplaySensorData中%06f格式
触发ARMCC完整FP printf路径(vsprintf->_printf_fp_dec->btod),仅此调用链
需~1252B栈空间,而Lora线程栈仅1024B导致栈溢出踩踏堆中定时器链表节点,
rt_list_remove在_rt_timer_remove中崩溃.增大栈至2048并启用
RT_USING_OVERFLOW_CHECK提前检测溢出.
2026-09-18 17:39:04 +08:00
YuanHongbin e23a0d01ae feat(lora): 宽频信道表扩展为120信道(433.1MHz~492.6MHz)
- sx127x.h: 信道宏CH0~CH119, 基准433100000ul+500kHz步进(CH0=433.1MHz, CH119=492.6MHz)
- sx127x.h: SX1276_CHANNEL_MAX 46 -> 120, LoraSetChannel范围检查自动跟随
- sx127x.c: gdwSx1276ChannelTbl信道表扩为120项
- sx127x.c: LoraSetFreqCent频率校验范围改为433.1MHz~492.6MHz(原470.1下限会拒绝CH0~CH73)
- main.c: 频率校验失败回退默认值改为CH0(433.1MHz)
- 注意: 信道号与窄频版(develop)语义不同, 同编号对应不同频率, 两种固件设备互不相通
- 默认信道CH8在宽频下为437.1MHz
2026-09-08 10:21:32 +08:00
10 changed files with 157 additions and 68 deletions
+1 -1
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@@ -1165,7 +1165,7 @@
<OCR_RVCT4> <OCR_RVCT4>
<Type>1</Type> <Type>1</Type>
<StartAddress>0x8000</StartAddress> <StartAddress>0x8000</StartAddress>
<Size>0x6c000</Size> <Size>0x3a000</Size>
</OCR_RVCT4> </OCR_RVCT4>
<OCR_RVCT5> <OCR_RVCT5>
<Type>1</Type> <Type>1</Type>
+3 -3
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@@ -1,10 +1,10 @@
; ************************************************************* ; *************************************************************
; *** Scatter-Loading Description File for GateWay APP *** ; *** Scatter-Loading Description File for GateWay APP ***
; *** Flash: APP区 0x8000起 (Boot 32KB), 到参数区0x7C000前 *** ; *** Flash: A区 0x8000~0x41FFF(232KB, 运行) + B区 0x42000~0x7BFFF(232KB, 升级暂存), 参数区0x7C000 ***
; ************************************************************* ; *************************************************************
LR_IROM1 0x00008000 0x00074000 { LR_IROM1 0x00008000 0x0003A000 {
ER_IROM1 0x00008000 0x00074000 { ER_IROM1 0x00008000 0x0003A000 {
*.o (RESET, +First) *.o (RESET, +First)
*(InRoot$$Sections) *(InRoot$$Sections)
.ANY (+RO) .ANY (+RO)
+1 -1
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@@ -41,7 +41,7 @@
#define RT_DEBUG_INIT 0 #define RT_DEBUG_INIT 0
// <c1>thread stack over flow detect // <c1>thread stack over flow detect
// <i> Diable Thread stack over flow detect // <i> Diable Thread stack over flow detect
//#define RT_USING_OVERFLOW_CHECK #define RT_USING_OVERFLOW_CHECK
// </c> // </c>
// </h> // </h>
+2 -2
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@@ -2,8 +2,8 @@
; *** Scatter-Loading Description File generated by uVision *** ; *** Scatter-Loading Description File generated by uVision ***
; ************************************************************* ; *************************************************************
LR_IROM1 0x00008000 0x0006C000 { ; load region size_region LR_IROM1 0x00008000 0x0003A000 { ; load region size_region
ER_IROM1 0x00008000 0x0006C000 { ; load address = execution address ER_IROM1 0x00008000 0x0003A000 { ; load address = execution address
*.o (RESET, +First) *.o (RESET, +First)
*(InRoot$$Sections) *(InRoot$$Sections)
.ANY (+RO) .ANY (+RO)
@@ -478,7 +478,14 @@ const uint32_t gdwSx1276ChannelTbl[SX1276_CHANNEL_MAX]={
CH10, CH11, CH12, CH13, CH14, CH15, CH16, CH17, CH18, CH19, CH10, CH11, CH12, CH13, CH14, CH15, CH16, CH17, CH18, CH19,
CH20, CH21, CH22, CH23, CH24, CH25, CH26, CH27, CH28, CH29, CH20, CH21, CH22, CH23, CH24, CH25, CH26, CH27, CH28, CH29,
CH30, CH31, CH32, CH33, CH34, CH35, CH36, CH37, CH38, CH39, CH30, CH31, CH32, CH33, CH34, CH35, CH36, CH37, CH38, CH39,
CH40, CH41, CH42, CH43, CH44, CH45 CH40, CH41, CH42, CH43, CH44, CH45, CH46, CH47, CH48, CH49,
CH50, CH51, CH52, CH53, CH54, CH55, CH56, CH57, CH58, CH59,
CH60, CH61, CH62, CH63, CH64, CH65, CH66, CH67, CH68, CH69,
CH70, CH71, CH72, CH73, CH74, CH75, CH76, CH77, CH78, CH79,
CH80, CH81, CH82, CH83, CH84, CH85, CH86, CH87, CH88, CH89,
CH90, CH91, CH92, CH93, CH94, CH95, CH96, CH97, CH98, CH99,
CH100, CH101, CH102, CH103, CH104, CH105, CH106, CH107, CH108, CH109,
CH110, CH111, CH112, CH113, CH114, CH115, CH116, CH117, CH118, CH119
}; };
//LORAPT_CHANNEL //LORAPT_CHANNEL
@@ -666,7 +673,7 @@ bool LoraSetRegPreamble(uint8_t RegPreamble)
} }
bool LoraSetFreqCent(uint32_t FreqCent) bool LoraSetFreqCent(uint32_t FreqCent)
{ {
if(FreqCent < 470100000 || FreqCent > 492600000) if(FreqCent < 433100000 || FreqCent > 492600000) //lora-wide: 433.1MHz~492.6MHz(与信道表匹配)
return false; return false;
LoRaPara.dwFreqHz = FreqCent; LoRaPara.dwFreqHz = FreqCent;
return true; return true;
+122 -48
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@@ -660,7 +660,7 @@ typedef enum{
LORAPT_MAX LORAPT_MAX
}Sx1276LoraParaType; }Sx1276LoraParaType;
#define SX1276_CHANNEL_MAX 46 #define SX1276_CHANNEL_MAX 120
#define LORA_SPI_NSS_SET() SPI2_NSS_SET() #define LORA_SPI_NSS_SET() SPI2_NSS_SET()
#define LORA_SPI_NSS_CLR() SPI2_NSS_CLR() #define LORA_SPI_NSS_CLR() SPI2_NSS_CLR()
@@ -758,54 +758,128 @@ typedef struct {
#endif #endif
/* /*
Lora频率:470100000ul + 500000*N, N=0~45, 共46个信道(470.1MHz~492.6MHz) Lora频率:433100000ul + 500000*N, N=0~119, 共120个信道(433.1MHz~492.6MHz) [lora-wide宽频版]
*/ */
#define CH0 (470100000ul + 0) //470.1MHz #define CH0 (433100000ul + 0) //433.1MHz
#define CH1 (470100000ul + 500000) #define CH1 (433100000ul + 500000)
#define CH2 (470100000ul + 1000000) #define CH2 (433100000ul + 1000000)
#define CH3 (470100000ul + 1500000) #define CH3 (433100000ul + 1500000)
#define CH4 (470100000ul + 2000000) #define CH4 (433100000ul + 2000000)
#define CH5 (470100000ul + 2500000) #define CH5 (433100000ul + 2500000)
#define CH6 (470100000ul + 3000000) #define CH6 (433100000ul + 3000000)
#define CH7 (470100000ul + 3500000) #define CH7 (433100000ul + 3500000)
#define CH8 (470100000ul + 4000000) #define CH8 (433100000ul + 4000000)
#define CH9 (470100000ul + 4500000) #define CH9 (433100000ul + 4500000)
#define CH10 (470100000ul + 5000000) #define CH10 (433100000ul + 5000000)
#define CH11 (470100000ul + 5500000) #define CH11 (433100000ul + 5500000)
#define CH12 (470100000ul + 6000000) #define CH12 (433100000ul + 6000000)
#define CH13 (470100000ul + 6500000) #define CH13 (433100000ul + 6500000)
#define CH14 (470100000ul + 7000000) #define CH14 (433100000ul + 7000000)
#define CH15 (470100000ul + 7500000) #define CH15 (433100000ul + 7500000)
#define CH16 (470100000ul + 8000000) #define CH16 (433100000ul + 8000000)
#define CH17 (470100000ul + 8500000) #define CH17 (433100000ul + 8500000)
#define CH18 (470100000ul + 9000000) #define CH18 (433100000ul + 9000000)
#define CH19 (470100000ul + 9500000) #define CH19 (433100000ul + 9500000)
#define CH20 (470100000ul + 10000000) #define CH20 (433100000ul + 10000000)
#define CH21 (470100000ul + 10500000) #define CH21 (433100000ul + 10500000)
#define CH22 (470100000ul + 11000000) #define CH22 (433100000ul + 11000000)
#define CH23 (470100000ul + 11500000) #define CH23 (433100000ul + 11500000)
#define CH24 (470100000ul + 12000000) #define CH24 (433100000ul + 12000000)
#define CH25 (470100000ul + 12500000) #define CH25 (433100000ul + 12500000)
#define CH26 (470100000ul + 13000000) #define CH26 (433100000ul + 13000000)
#define CH27 (470100000ul + 13500000) #define CH27 (433100000ul + 13500000)
#define CH28 (470100000ul + 14000000) #define CH28 (433100000ul + 14000000)
#define CH29 (470100000ul + 14500000) #define CH29 (433100000ul + 14500000)
#define CH30 (470100000ul + 15000000) #define CH30 (433100000ul + 15000000)
#define CH31 (470100000ul + 15500000) #define CH31 (433100000ul + 15500000)
#define CH32 (470100000ul + 16000000) #define CH32 (433100000ul + 16000000)
#define CH33 (470100000ul + 16500000) #define CH33 (433100000ul + 16500000)
#define CH34 (470100000ul + 17000000) #define CH34 (433100000ul + 17000000)
#define CH35 (470100000ul + 17500000) #define CH35 (433100000ul + 17500000)
#define CH36 (470100000ul + 18000000) #define CH36 (433100000ul + 18000000)
#define CH37 (470100000ul + 18500000) #define CH37 (433100000ul + 18500000)
#define CH38 (470100000ul + 19000000) #define CH38 (433100000ul + 19000000)
#define CH39 (470100000ul + 19500000) #define CH39 (433100000ul + 19500000)
#define CH40 (470100000ul + 20000000) #define CH40 (433100000ul + 20000000)
#define CH41 (470100000ul + 20500000) #define CH41 (433100000ul + 20500000)
#define CH42 (470100000ul + 21000000) #define CH42 (433100000ul + 21000000)
#define CH43 (470100000ul + 21500000) #define CH43 (433100000ul + 21500000)
#define CH44 (470100000ul + 22000000) #define CH44 (433100000ul + 22000000)
#define CH45 (470100000ul + 22500000) //492.6MHz #define CH45 (433100000ul + 22500000)
#define CH46 (433100000ul + 23000000)
#define CH47 (433100000ul + 23500000)
#define CH48 (433100000ul + 24000000)
#define CH49 (433100000ul + 24500000)
#define CH50 (433100000ul + 25000000)
#define CH51 (433100000ul + 25500000)
#define CH52 (433100000ul + 26000000)
#define CH53 (433100000ul + 26500000)
#define CH54 (433100000ul + 27000000)
#define CH55 (433100000ul + 27500000)
#define CH56 (433100000ul + 28000000)
#define CH57 (433100000ul + 28500000)
#define CH58 (433100000ul + 29000000)
#define CH59 (433100000ul + 29500000)
#define CH60 (433100000ul + 30000000)
#define CH61 (433100000ul + 30500000)
#define CH62 (433100000ul + 31000000)
#define CH63 (433100000ul + 31500000)
#define CH64 (433100000ul + 32000000)
#define CH65 (433100000ul + 32500000)
#define CH66 (433100000ul + 33000000)
#define CH67 (433100000ul + 33500000)
#define CH68 (433100000ul + 34000000)
#define CH69 (433100000ul + 34500000)
#define CH70 (433100000ul + 35000000)
#define CH71 (433100000ul + 35500000)
#define CH72 (433100000ul + 36000000)
#define CH73 (433100000ul + 36500000)
#define CH74 (433100000ul + 37000000)
#define CH75 (433100000ul + 37500000)
#define CH76 (433100000ul + 38000000)
#define CH77 (433100000ul + 38500000)
#define CH78 (433100000ul + 39000000)
#define CH79 (433100000ul + 39500000)
#define CH80 (433100000ul + 40000000)
#define CH81 (433100000ul + 40500000)
#define CH82 (433100000ul + 41000000)
#define CH83 (433100000ul + 41500000)
#define CH84 (433100000ul + 42000000)
#define CH85 (433100000ul + 42500000)
#define CH86 (433100000ul + 43000000)
#define CH87 (433100000ul + 43500000)
#define CH88 (433100000ul + 44000000)
#define CH89 (433100000ul + 44500000)
#define CH90 (433100000ul + 45000000)
#define CH91 (433100000ul + 45500000)
#define CH92 (433100000ul + 46000000)
#define CH93 (433100000ul + 46500000)
#define CH94 (433100000ul + 47000000)
#define CH95 (433100000ul + 47500000)
#define CH96 (433100000ul + 48000000)
#define CH97 (433100000ul + 48500000)
#define CH98 (433100000ul + 49000000)
#define CH99 (433100000ul + 49500000)
#define CH100 (433100000ul + 50000000)
#define CH101 (433100000ul + 50500000)
#define CH102 (433100000ul + 51000000)
#define CH103 (433100000ul + 51500000)
#define CH104 (433100000ul + 52000000)
#define CH105 (433100000ul + 52500000)
#define CH106 (433100000ul + 53000000)
#define CH107 (433100000ul + 53500000)
#define CH108 (433100000ul + 54000000)
#define CH109 (433100000ul + 54500000)
#define CH110 (433100000ul + 55000000)
#define CH111 (433100000ul + 55500000)
#define CH112 (433100000ul + 56000000)
#define CH113 (433100000ul + 56500000)
#define CH114 (433100000ul + 57000000)
#define CH115 (433100000ul + 57500000)
#define CH116 (433100000ul + 58000000)
#define CH117 (433100000ul + 58500000)
#define CH118 (433100000ul + 59000000)
#define CH119 (433100000ul + 59500000) //492.6MHz
/*Lora中心频率默认值(编译期用于频道表等) /*Lora中心频率默认值(编译期用于频道表等)
实际运行频率由Boot参数区(BootPara_t.LoraFreq)配置, APP启动时覆盖ConfigPara.Lora.FreqCent*/ 实际运行频率由Boot参数区(BootPara_t.LoraFreq)配置, APP启动时覆盖ConfigPara.Lora.FreqCent*/
+6 -4
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@@ -16,12 +16,14 @@
#define FLASH_BOOT_BASE (FLASH_BASE) #define FLASH_BOOT_BASE (FLASH_BASE)
#define FLASH_BOOT_SIZE (4*FLASH_SECTOR_SIZE) #define FLASH_BOOT_SIZE (4*FLASH_SECTOR_SIZE)
//app //app A区(运行, 0x8000起, 232KB) + B区(升级暂存, 0x42000起, 232KB) - 与Boot A/B分区一致
#define FLASH_APP_BASE (FLASH_BOOT_BASE+ FLASH_BOOT_SIZE) #define FLASH_APP_BASE (FLASH_BOOT_BASE+ FLASH_BOOT_SIZE)
#define FLASH_APP_SIZE (58*FLASH_SECTOR_SIZE) #define FLASH_APP_SIZE (29*FLASH_SECTOR_SIZE)
#define FLASH_APPB_BASE (FLASH_APP_BASE + FLASH_APP_SIZE)
#define FLASH_APPB_SIZE (29*FLASH_SECTOR_SIZE)
//boot info //boot info (0x7C000, 位置不变)
#define FLASH_BINFO_BASE (FLASH_APP_BASE + FLASH_APP_SIZE) #define FLASH_BINFO_BASE (FLASH_APPB_BASE + FLASH_APPB_SIZE)
#define FLASH_BINFO_SIZE (1*FLASH_SECTOR_SIZE) #define FLASH_BINFO_SIZE (1*FLASH_SECTOR_SIZE)
//user config //user config
+1 -1
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@@ -92,7 +92,7 @@ void Lora_Thread_Entry(void *parameter)
Debug_Printf("CatOneIRQ Sem Create Failed!\r\n"); Debug_Printf("CatOneIRQ Sem Create Failed!\r\n");
} }
LoraIRQ_Thread = rt_thread_create("LoraIRQ", LoraIRQ_Thread_Entry, NULL, 1024, 3, 20); LoraIRQ_Thread = rt_thread_create("LoraIRQ", LoraIRQ_Thread_Entry, NULL, 2048, 3, 20);
if (LoraIRQ_Thread != RT_NULL) if (LoraIRQ_Thread != RT_NULL)
rt_thread_startup(LoraIRQ_Thread); rt_thread_startup(LoraIRQ_Thread);
+6
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@@ -19,6 +19,12 @@ void Update(uint8_t *PayLoad)
memcpy(&Req, PayLoad, sizeof(UpDataRequset_t)); memcpy(&Req, PayLoad, sizeof(UpDataRequset_t));
/*固件大小校验: 为0或超出B区容量时拒绝升级, 不置标志不复位*/
if(Req.AppSize == 0 || Req.AppSize > FLASH_APPB_SIZE) {
U_DBG_LOG("AppSize invalid: %d (max %d)\r\n", (int)Req.AppSize, (int)FLASH_APPB_SIZE);
return;
}
/*读回现有boot参数,保留FirstRunFlag等字段*/ /*读回现有boot参数,保留FirstRunFlag等字段*/
dev_boot_read_param(&cfg); dev_boot_read_param(&cfg);
cfg.AppSize = Req.AppSize; cfg.AppSize = Req.AppSize;
+2 -2
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@@ -235,7 +235,7 @@ void GateWayInit(void)
} }
if(LoraSetFreqCent(GateWay.ConfigPara.Lora.FreqCent) == false) if(LoraSetFreqCent(GateWay.ConfigPara.Lora.FreqCent) == false)
{ {
GateWay.ConfigPara.Lora.FreqCent = 470100000; GateWay.ConfigPara.Lora.FreqCent = 433100000; //lora-wide: 回退到CH0
LoraSetFreqCent(GateWay.ConfigPara.Lora.FreqCent); LoraSetFreqCent(GateWay.ConfigPara.Lora.FreqCent);
} }
if(LoraSetPower(GateWay.ConfigPara.Lora.ucPower) == false) { if(LoraSetPower(GateWay.ConfigPara.Lora.ucPower) == false) {
@@ -397,7 +397,7 @@ int main(void)
else else
return -1; return -1;
Lora_Thread = rt_thread_create("Lora", Lora_Thread_Entry, &GateWay, 1024, 3, 20); Lora_Thread = rt_thread_create("Lora", Lora_Thread_Entry, &GateWay, 2048, 3, 20);
if (Lora_Thread != RT_NULL) if (Lora_Thread != RT_NULL)
rt_thread_startup(Lora_Thread); rt_thread_startup(Lora_Thread);
else else