diff --git a/Netlist_Queen_Post_V1.1_2026-09-04.tel b/Netlist_Queen_Post_V1.1_2026-09-04.tel
new file mode 100644
index 0000000..2b4cfc6
--- /dev/null
+++ b/Netlist_Queen_Post_V1.1_2026-09-04.tel
@@ -0,0 +1,166 @@
+$PACKAGES
+BUZ-TH_BD12.0-P7.60-D0.6-FD ! BUZ-TH_BD12.0-P7.60-D0.6-FD ! '2.7kHz' ; BUZZER 
+C0603 ! C0603 ! 100nF ; C1 C5 C9 C11 C14 C16 C17 C20 C22 C24 C29 C30 C31 C35 ,
+        C37 C38 C40 C43 C44 C45 C47 C48 C49 C52 
+C0603 ! C0603 ! 100pF ; C27 C28 C33 C34 C41 C42 C50 C51 
+C0603 ! C0603 ! 10uF ; C13 C15 C19 C21 C23 C25 C32 C36 C39 C46 
+C0603 ! C0603 ! 47pF ; C2 
+C0805 ! C0805 ! 100nF ; C8 
+C0805 ! C0805 ! 22uF ; C4 C10 C12 C18 
+C1206 ! C1206 ! '2.2uF' ; C7 
+CAP-TH_BD8.0-P3.50-D0.6-FD ! CAP-TH_BD8.0-P3.50-D0.6-FD ! 470uF ; C3 
+CAP-TH_BD8.0-P3.50-D0.6-FD ! CAP-TH_BD8.0-P3.50-D0.6-FD ! 47uF ; C6 
+,
+        CONN-TH_4P-P1.25_HCTL_HC-1.25-4A ! CONN-TH_4P-P1.25_HCTL_HC-1.25-4A ! '{Value}' ,
+        ; LED 
+,
+        CONN-TH_5P-P1.25_HCTL_HC-1.25-5A ! CONN-TH_5P-P1.25_HCTL_HC-1.25-5A ! '{Value}' ,
+        ; CN1 CN2 
+,
+        CONN-TH_5P-P1.25_HCTL_HC-1.25-5AW ! CONN-TH_5P-P1.25_HCTL_HC-1.25-5AW ! '{Value}' ,
+        ; CN4 CN5 CN6 CN7 
+,
+        CONN-TH_7P-P1.25_HCTL_HC-1.25-7A ! CONN-TH_7P-P1.25_HCTL_HC-1.25-7A ! '{Value}' ,
+        ; DEBUG 
+HDR-TH_2P-P2.54-V-M ! HDR-TH_2P-P2.54-V-M ! '{Value}' ; H1 H4 
+HDR-TH_6P-P2.54-V-M ! HDR-TH_6P-P2.54-V-M ! '{Value}' ; H2 H3 
+IND-SMD_L7.1-W6.6 ! IND-SMD_L7.1-W6.6 ! 47uH ; L1 
+LED0603-RD ! LED0603-RD ! '{Value}' ; GREEN RED 
+,
+        LQFP-48_L7.0-W7.0-P0.50-LS9.0-BL ! LQFP-48_L7.0-W7.0-P0.50-LS9.0-BL ! '{Value}' ,
+        ; U6 
+M3 ! M3 ! '{Value}' ; U8 U9 U10 U11 
+R0603 ! R0603 ! '1.5kΩ' ; R20 R22 
+R0603 ! R0603 ! '100Ω' ; R12 R13 R16 R17 R18 R19 R27 R28 
+R0603 ! R0603 ! '10kΩ' ; R10 R14 R29 
+R0603 ! R0603 ! '1kΩ' ; R9 R23 R26 
+R0603 ! R0603 ! '2.2kΩ' ; R3 R4 R21 R24 
+R0603 ! R0603 ! '20kΩ' ; R6 
+R0603 ! R0603 ! '22Ω' ; R1 
+R0603 ! R0603 ! '300kΩ' ; R2 
+R0603 ! R0603 ! '30mΩ' ; R5 
+R0603 ! R0603 ! '4.7kΩ' ; R15 
+R0603 ! R0603 ! '510Ω' ; R7 R8 
+R0805 ! R0805 ! '0Ω' ; R11 
+RJ45-TH_RJ48-56-10P10C_MZ ! RJ45-TH_RJ48-56-10P10C_MZ ! '{Value}' ; RJ1 RJ2 
+SMA_L4.3-W2.6-LS5.0-FD ! SMA_L4.3-W2.6-LS5.0-FD ! '{Value}' ; D1 
+SMA_L4.3-W2.6-LS5.2-RD ! SMA_L4.3-W2.6-LS5.2-RD ! '{Value}' ; D3 D5 
+SMA_L4.4-W2.6-LS5.0-BI ! SMA_L4.4-W2.6-LS5.0-BI ! '{Value}' ; D4 
+SOD-123FL_L2.7-W1.8-LS3.8-RD ! SOD-123FL_L2.7-W1.8-LS3.8-RD ! '{Value}' ; D2 
+SOD-323_L1.8-W1.3-LS2.5-RD ! SOD-323_L1.8-W1.3-LS2.5-RD ! '{Value}' ; D6 
+,
+        SOIC-8_L4.9-W3.9-P1.27-LS6.0-BL-EP ! SOIC-8_L4.9-W3.9-P1.27-LS6.0-BL-EP ! '{Value}' ,
+        ; U1 
+SOIC-8_L5.0-W4.0-P1.27-LS6.0-BL ! SOIC-8_L5.0-W4.0-P1.27-LS6.0-BL ! '{Value}' ,
+        ; U4 U7 U12 U13 
+,
+        SOT-23-3_L2.9-W1.3-P1.90-LS2.4-BR ! SOT-23-3_L2.9-W1.3-P1.90-LS2.4-BR ! '{Value}' ,
+        ; Q2 Q3 Q4 
+SOT-89_L4.5-W2.5-P1.50-LS4.2-BR ! SOT-89_L4.5-W2.5-P1.50-LS4.2-BR ! '{Value}' ,
+        ; U2 U3 
+,
+        SOT-89-3_L4.5-W2.5-P1.50-LS4.2-BR ! SOT-89-3_L4.5-W2.5-P1.50-LS4.2-BR ! '{Value}' ,
+        ; Q1 
+Test-Point-0.5mm ! Test-Point-0.5mm ! '{Value}' ; 12.8V 
+,
+        TSSOP-20_L6.5-W4.4-P0.65-LS6.4-BL ! TSSOP-20_L6.5-W4.4-P0.65-LS6.4-BL ! '{Value}' ,
+        ; U5 
+$A_PROPERTIES
+$NETS
+'+5V' ; RJ1.P6 RJ2.P6 
+'$1N110513' ; C1.2 R1.1 
+'$1N110514' ; C1.1 D1.2 L1.1 U1.1 
+'$1N110520' ; R1.2 U1.8 
+'$1N110523' ; C2.1 R2.1 R6.2 U1.5 
+'$1N116128' ; R15.1 U6.44 
+'$1N116244' ; C43.2 U6.22 
+'$1N125934' ; H3.6 U6.38 
+'$1N125936' ; H3.5 U6.39 
+'$1N125938' ; H3.4 U6.40 
+'$1N125940' ; H3.3 U6.41 
+'$1N125942' ; H3.2 U6.42 
+'$1N125944' ; H3.1 U6.43 
+'$1N126001' ; H2.2 U6.2 
+'$1N126003' ; H2.3 U6.3 
+'$1N126005' ; H2.4 U6.4 
+'$1N126007' ; H2.5 U6.5 
+'$1N126009' ; H2.6 U6.6 
+'$1N140888' ; CN6.2 R18.1 
+'$1N170439' ; BUZZER.2 D6.2 Q2.3 
+'$1N170441' ; Q2.1 R9.2 R10.2 
+'$1N170456' ; LED.4 R8.1 RED.2 
+'$1N170459' ; GREEN.2 LED.1 R7.1 
+'$1N170464' ; CN4.3 R16.1 
+'$1N170465' ; CN4.2 R12.1 
+'$1N170478' ; R14.1 U5.10 
+'$1N96636' ; CN5.3 R17.1 
+'$1N96637' ; CN5.2 R13.1 
+'$1N96922' ; CN6.3 R27.1 
+'$1N97208' ; CN7.3 R28.1 
+'$1N97209' ; CN7.2 R19.1 
+'AVCC_5V' ; C9.2 C10.2 C21.2 C22.1 C24.1 C25.1 C32.2 C35.1 C39.2 C40.1 C46.2 ,
+        C47.1 CN4.1 CN5.1 CN6.1 CN7.1 U2.2 U4.1 U4.7 U5.19 U7.1 U7.7 U12.1 ,
+        U12.7 U13.1 U13.7 
+'I2C_INT1' ; CN1.4 U6.10 
+'I2C_INT2' ; CN2.4 U6.11 
+'I2C_SCL' ; CN1.2 CN2.2 R4.1 U6.12 
+'I2C_SDA' ; CN1.3 CN2.3 R3.1 U6.13 
+'IO_BIT0' ; Q3.2 R20.1 R23.2 U6.25 
+'IO_BIT1' ; Q4.2 R22.1 R26.2 U6.26 
+'IO_DOUT1' ; U5.1 U6.21 
+'IO_DOUT2' ; U5.4 U6.19 
+'IO_DOUT3' ; U5.9 U6.14 
+'IO_DOUT4' ; U5.7 U6.16 
+'IO_SCLK1' ; U5.3 U6.20 
+'IO_SCLK2' ; U5.5 U6.18 
+'IO_SCLK3' ; U5.8 U6.15 
+'IO_SCLK4' ; U5.6 U6.17 
+'RJ45-RX' ; H2.1 RJ1.P3 RJ2.P3 U6.1 
+'RJ45-TX' ; RJ1.P5 RJ2.P5 
+'UART1_RXD' ; DEBUG.6 U6.32 
+'UART1_TXD' ; DEBUG.5 U6.33 
+'VCC_12V8' ; 12.8V.1 C2.2 C3.1 C4.2 C5.2 C13.2 C14.2 C15.2 C16.2 C19.2 C20.2 ,
+        D2.1 L1.2 Q1.3 R2.2 U2.3 U3.3 
+'VCC_3V3' ; C17.2 C18.2 C23.1 C29.2 C36.1 C37.2 C38.2 C49.2 C52.2 CN1.1 CN2.1 ,
+        DEBUG.7 Q1.2 Q3.1 Q4.1 R3.2 R4.2 R7.2 R8.2 R14.2 R15.2 R20.2 R22.2 ,
+        R29.1 U5.2 U6.9 U6.24 U6.36 U6.48 
+'VCC_5V' ; BUZZER.1 C11.2 C12.2 D6.1 R21.2 R24.2 U3.2 
+AGND ; C9.1 C10.1 C21.1 C22.2 C24.2 C25.2 C27.1 C28.1 C32.1 C33.2 C34.2 C35.2 ,
+        C39.1 C40.2 C41.1 C42.1 C46.1 C47.2 C50.2 C51.2 CN4.4 CN4.5 CN5.4 ,
+        CN5.5 CN6.4 CN6.5 CN7.4 CN7.5 R11.2 U4.2 U7.2 U12.2 U13.2 
+AINN1 ; C27.2 C30.1 R12.2 U4.3 
+AINN2 ; C28.2 C31.1 R13.2 U7.3 
+AINN3 ; C41.2 C44.1 R18.2 U12.3 
+AINN4 ; C42.2 C45.1 R19.2 U13.3 
+AINP1 ; C30.2 C33.1 R16.2 U4.4 
+AINP2 ; C31.2 C34.1 R17.2 U7.4 
+AINP3 ; C44.2 C50.1 R27.2 U12.4 
+AINP4 ; C45.2 C51.1 R28.2 U13.4 
+BIT0 ; H4.1 Q3.3 R21.1 RJ1.P8 RJ2.P8 
+BIT1 ; H4.2 Q4.3 R24.1 RJ1.P9 RJ2.P9 
+BIT2 ; RJ1.P7 RJ2.P7 
+BIT3 ; RJ1.P2 RJ2.P2 
+BUZZ ; R9.1 U6.28 
+DOUT1 ; U4.6 U5.20 
+DOUT2 ; U5.17 U7.6 
+DOUT3 ; U5.12 U12.6 
+DOUT4 ; U5.14 U13.6 
+GND ; C3.2 C4.1 C5.1 C6.2 C7.1 C8.1 C11.1 C12.1 C13.1 C14.1 C15.1 C16.1 C17.1 ,
+        C18.1 C19.1 C20.1 C23.2 C29.1 C36.2 C37.1 C38.1 C43.1 C48.1 C49.1 ,
+        C52.1 CN1.5 CN2.5 D1.1 D2.2 D4.1 DEBUG.1 H1.2 Q1.1 Q2.2 R6.1 R10.1 ,
+        R11.1 R23.1 R26.1 RJ1.P4 RJ1.P10 RJ2.P4 RJ2.P10 U1.4 U2.1 U3.1 U5.11 ,
+        U6.8 U6.23 U6.35 U6.47 U8.1 U9.1 U10.1 U11.1 
+GREEN ; GREEN.1 LED.2 U6.30 
+ILIM ; R5.2 U1.2 U1.9 
+NRST ; C48.2 DEBUG.2 H1.1 R29.2 U6.7 
+POWER ; C6.1 C7.2 C8.2 D3.1 D5.1 R5.1 U1.3 
+RED ; LED.3 RED.1 U6.29 
+SCLK1 ; U4.5 U5.18 
+SCLK2 ; U5.16 U7.5 
+SCLK3 ; U5.13 U12.5 
+SCLK4 ; U5.15 U13.5 
+SWCLK ; DEBUG.3 U6.37 
+SWDIO ; DEBUG.4 U6.34 
+VIN ; D3.2 D4.2 D5.2 RJ1.P1 RJ2.P1 
+$SCHEDULE
+$END