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YuanHongbin
2025-09-12 18:42:34 +08:00
parent 65050998b4
commit 4a33e4970a
20 changed files with 4496 additions and 500 deletions
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Project/HC32F460/source/Module/CS1237/CS1237_LEFTLOW.c
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#include "CS1237_LEFTLOW.h"
#include "Debug.h"
#include "bsp.h"
#include "main.h"
#include "Algorithm.h"
LEFTLOW_CS1237Var_t LEFTLOW_CS1237Var;
static bool InitFlag;
static bool CS1237IrqFlag;
static bool BuildDelay;
static uint8_t CS1237Port;
static uint8_t CS1237Hz;
static uint8_t CS1237PGA;
extern void LEFTLOW_CS1237AinADataProcessCallBack(int32_t AD);
/** cs1237 时序时钟*/
static void CS1237_Clock(void)
{
CS1237_SCLK_H();
CS1237_100NS(3);
CS1237_SCLK_L();
CS1237_100NS(3);
}
/** cs1237 休眠*/
static void CS1237_Sleep(void)
{
CS1237_SCLK_H();
CS1237_1US(150);
}
/** cs1237 唤醒*/
static void CS1237_WakeUp(void)
{
CS1237_SCLK_L();
CS1237_1US(20);
}
/**设置CS1237寄存器*/
static void Set_CS1237_Config(uint8_t ad_reg)
{
uint16_t bit_cout = 0;
uint8_t reg_temp = 0x00;
//DOUT由高变低之后开始读取数据
CS1237_DOUT_OUT();
CS1237_DOUT_H();
CS1237_DOUT_IN();
CS1237_SCLK_L(); //时钟拉低
LEFTLOW_CS1237Var.CS1237Delay1mSCnt = 300;
CS1237IrqFlag = false;
while(CS1237IrqFlag == false) //等待芯片准备好
{
if(CS1237Var.CS1237Delay1mSCnt <= 0){
DBG_LOG("LEFTLOW CS1237 Preparation Timeout...\r\n");
return; // 超时退出
}
}
CS1237IntDisable();
CS1237IrqFlag = false;
/* clk1-clk26 写期间不需要操作*/
for (bit_cout = 0; bit_cout < 26; bit_cout++)
{
CS1237_Clock(); //给一周期时钟
}
/* clk27 DOUT输出拉高*/
CS1237_Clock(); //给一周期时钟
CS1237_DOUT_H();
/* clk28 - clk29 发送写寄存器命令字 */
CS1237_Clock(); //给一周期时钟
CS1237_Clock(); //给一周期时钟
/* clk30 - clk36 发送写寄存器命令字 */
CS1237_DOUT_OUT();
reg_temp = WRITE_CONFIG_CMD << 1; //命令长度为 7bits (写0x65)左移1位
for (bit_cout = 0; bit_cout < 7; bit_cout++)
{
if (reg_temp & 0x80) //MSB
{
CS1237_DOUT_H();
}
else
{
CS1237_DOUT_L();
}
reg_temp = reg_temp << 1;
CS1237_Clock();
}
/* clk37写寄存器模式还是输出 */
CS1237_Clock();
/* clk38 ~ clk45 写入寄存器值 */
reg_temp = ad_reg;//要配件的寄存器数值
for (bit_cout = 0; bit_cout < 8; bit_cout++)
{
if (reg_temp & 0x80) //MSB
{
CS1237_DOUT_H();
}
else
{
CS1238_DOUT_L();
}
reg_temp = reg_temp << 1;
CS1237_Clock();
}
/* 8: clk46 */
CS1237_Clock();
CS1237_DOUT_H();
CS1237_DOUT_IN();
CS1237IntEnable();
return ;
}
/**读CS1237寄存器*/
static int32_t Read_CS1237_Config(void)
{
uint16_t bit_cout = 0;
uint8_t reg_temp = 0x00;
//DOUT由高变低之后开始读取数据
CS1237_DOUT_OUT();
CS1237_DOUT_H();
CS1237_DOUT_IN();
CS1237_SCLK_L(); //时钟拉低
CS1237Var.CS1237Delay1mSCnt = 300;
CS1237IrqFlag = false;
while(CS1237IrqFlag == false) //等待芯片准备好
{
if(CS1237Var.CS1237Delay1mSCnt <= 0){
DBG_LOG("LEFTLOW CS1237 Preparation Timeout...\r\n");
return 0; // 超时退出
}
}
CS1237IntDisable();
CS1237IrqFlag = false;
/* clk1-clk26 写期间不需要操作*/
for (bit_cout = 0; bit_cout < 26; bit_cout++)
{
CS1237_Clock(); //给一周期时钟
}
/* clk27 DOUT输出拉高*/
CS1237_Clock(); //给一周期时钟
CS1237_DOUT_H();
/* clk28 - clk29 发送写寄存器命令字 */
CS1237_Clock(); //给一周期时钟
CS1237_Clock(); //给一周期时钟
/* clk30 - clk36 发送读寄存器命令字 */
CS1237_DOUT_OUT();
reg_temp = READ_CONFIG_CMD << 1; //命令长度为 7bits (写0x56)左移1位
for (bit_cout = 0; bit_cout < 7; bit_cout++)
{
if (reg_temp & 0x80) //MSB
{
CS1237_DOUT_H();
}
else
{
CS1237_DOUT_L();
}
reg_temp = reg_temp << 1;
CS1237_Clock();
}
/* clk37，读寄存器模式改输入 */
CS1237_Clock();
CS1237_DOUT_IN();
for (bit_cout = 0; bit_cout < 8; bit_cout++)
{
CS1237_SCLK_H();
reg_temp <<= 1; //左移1位准备接受数据 初始默认0
CS1237_100NS(3);//延时300ns
if(GET_CS1237_DOUT() == true) //有数值则累加
reg_temp |= 1;
CS1237_SCLK_L();
CS1237_100NS(3);
}
/* 8: clk46 */
CS1237_Clock();
CS1237_DOUT_IN();
CS1237_DOUT_H();
CS1237IntEnable();
return reg_temp ;
}
/**读取CS1237的AD数*/
static int32_t Read_CS1237_Ad_Data(void)
{
uint16_t bit_cout = 0;
int32_t data_temp = 0;
/* clk1 ~ clk24 ADC数据*/
data_temp = 0;
for (bit_cout = 0; bit_cout < 24; bit_cout++)
{
CS1237_SCLK_H();
data_temp <<= 1; //左移1位准备接受数据 初始默认0
CS1237_100NS(3);//延时300ns
if(GET_CS1237_DOUT() == true) //有数值则累加
data_temp |= 1;
CS1237_SCLK_L();
CS1237_100NS(3);
}
/* clk25 ~ clk27 */
for (bit_cout = 24; bit_cout < 27; bit_cout++)
{
CS1237_Clock(); //给一周期时钟
}
CS1237_DOUT_H();
CS1237_SCLK_L();
if(data_temp > 0x7FFFFF) //取24位
{
data_temp |= 0xFF000000;
}
return data_temp;
}
void LEFTLOW_CS1237_IrqCallBack(void)
{
CS1237IrqFlag = true;
}
void LEFTLOW_CS1237_Init(void)
{
CS1237IrqFlag = false;
BuildDelay = false;
CS1237IntEnable();
LEFTLOW_CS1237Var.AinA_AD = 0;
//CS1237Var.Ain2_AD = 0;
LEFTLOW_CS1237Var.Temp_AD = 0;
LEFTLOW_CS1237Var.Jump_AD = 0;
CS1237Port = CH_SEL_A;
CS1237Hz = SPEED_SEL_40Hz;
CS1237PGA = PGA_SEL_128;
uint8_t read_reg = 0x00;
uint8_t set_reg = REFO_ON | CS1237Hz | CS1237PGA | CS1237Port;
CS1237_1MS(20);
Set_CS1237_Config(set_reg);
CS1237_1MS(20);
read_reg = Read_CS1237_Config();
CS1237_1MS(20);
if(read_reg != set_reg){
DBG_LOG("LEFTLOW CS1237 Init ERR...\r\n");
DBG_LOG("set_reg = %02X\tread_reg = %02X\r\n",set_reg,read_reg);
InitFlag = false;
}
else {
DBG_LOG("LEFTLOW CS1237 Init OK...\r\n");
//DBG_LOG("set_reg = %02X\tread_reg = %02X\r\n",set_reg,read_reg);
CS1237Port = read_reg & 0x03;
InitFlag = true;
}
}
void LEFTLOW_CS1237DataLoopCollect(void)
{
static int32_t ad_array[PACK_NUM];
static uint8_t adcnt;
static uint8_t TimeOutmagcnt;
switch(LEFTLOW_CS1237Var.Status) {
case CS1237_STATUS_IDLE:{
break;}
case CS1237_STATUS_START:{
memset(&ad_array, 0x00, sizeof(ad_array));
adcnt = 0;
TimeOutmagcnt = 0;
memset(&LEFTLOW_CS1237Var, NULL, sizeof(LEFTLOW_CS1237Var));
if(BuildDelay == true)
{
BuildDelay = false;
if(CS1237Hz == SPEED_SEL_10Hz){
LEFTLOW_CS1237Var.CS1237Delay1mSCnt = tCon_10Hz;
}
if(CS1237Hz == SPEED_SEL_40Hz){
LEFTLOW_CS1237Var.CS1237Delay1mSCnt = tCon_40Hz;
}
if(CS1237Hz == SPEED_SEL_640Hz){
LEFTLOW_CS1237Var.CS1237Delay1mSCnt = tCon_640Hz;
}
if(CS1237Hz == SPEED_SEL6_1280Hz){
LEFTLOW_CS1237Var.CS1237Delay1mSCnt = tCon_1280Hz;
}
LEFTLOW_CS1237Var.Status = CS1237_STATUS_DELAY;
}
else
{
LEFTLOW_CS1237Var.Status = CS1237_STATUS_READ;
}
break;}
case CS1237_STATUS_DELAY:{
if(LEFTLOW_CS1237Var.CS1237Delay1mSCnt <= 0){
LEFTLOW_CS1237Var.Status = CS1237_STATUS_READ;
}
break;}
case CS1237_STATUS_READ:{
CS1237IrqFlag = false;
LEFTLOW_CS1237Var.CS1237Delay1mSCnt = 100;
LEFTLOW_CS1237Var.Status = CS1237_STATUS_WAIT_READ;
break;}
case CS1237_STATUS_WAIT_READ:{
if(LEFTLOW_CS1237Var.CS1237Delay1mSCnt <= 0){
LEFTLOW_CS1237Var.Status = CS1237_STATUS_READ;
TimeOutmagcnt++;
}
if(CS1237IrqFlag == true){
CS1237IrqFlag = false;
ad_array[adcnt++] = Read_CS1237_Ad_Data();
LEFTLOW_CS1237Var.Status = CS1237_STATUS_READ;
}
if(TimeOutmagcnt >= PACK_NUM){
TimeOutmagcnt = 0;
if(adcnt > 0){
if(CS1237Port == CH_SEL_A){
LEFTLOW_CS1237Var.AinA_AD = IntFilter_32t(ad_array, adcnt, FILTER_NUM);
LEFTLOW_CS1237AinADataProcessCallBack(LEFTLOW_CS1237Var.AinA_AD);
}
if(CS1237Port == CH_SEL_TEMP){
LEFTLOW_CS1237Var.Temp_AD = IntFilter_32t(ad_array, adcnt, FILTER_NUM);
//CS1237TempDataProcessCallBack(LEFTLOW_CS1237Var.Temp_AD);
}
if(CS1237Port == CH_SEL_JUMP){
LEFTLOW_CS1237Var.Jump_AD = IntFilter_32t(ad_array, adcnt, FILTER_NUM);
//CS1237JumpDataProcessCallBack(LEFTLOW_CS1237Var.Jump_AD);
}
LEFTLOW_CS1237Var.Status = CS1237_STATUS_CH_SEL;
}
else{
if(CS1237Port == CH_SEL_A){
DBG_LOG("CS1238 CHA TimeOut...\r\n");
}
if(CS1237Port == CH_SEL_TEMP){
DBG_LOG("CS1238 Temp TimeOut...\r\n");
}
if(CS1237Port == CH_SEL_JUMP){
DBG_LOG("CS1238 Jump TimeOut...\r\n");
}
LEFTLOW_CS1237Var.Status = CS1237_STATUS_CH_SEL;
}
}
if(adcnt >= PACK_NUM){
if(CS1237Port == CH_SEL_A){
LEFTLOW_CS1237Var.AinA_AD = IntFilter_32t(ad_array, adcnt, FILTER_NUM);
LEFTLOW_CS1237AinADataProcessCallBack(LEFTLOW_CS1237Var.AinA_AD);
}
if(CS1237Port == CH_SEL_TEMP){
LEFTLOW_CS1237Var.Temp_AD = IntFilter_32t(ad_array, adcnt, FILTER_NUM);
//CS1237TempDataProcessCallBack(LEFTLOW_CS1237Var.Temp_AD);
}
if(CS1237Port == CH_SEL_JUMP){
LEFTLOW_CS1237Var.Jump_AD = IntFilter_32t(ad_array, adcnt, FILTER_NUM);
//CS1237JumpDataProcessCallBack(LEFTLOW_CS1237Var.Jump_AD);
}
LEFTLOW_CS1237Var.Status = CS1237_STATUS_CH_SEL;
}
break;}
case CS1237_STATUS_CH_SEL:{
LEFTLOW_CS1237Var.Status = CS1237_STATUS_STOP;
BuildDelay = false;
uint8_t read_reg;
if(CS1237Port == CH_SEL_A){
#if(PORT_TEMP == 1)
read_reg = Read_CS1237_Config();
Set_CS1237_Config((read_reg & 0xFC) | CH_SEL_TEMP);
CS1237Port = CH_SEL_TEMP;
BuildDelay = true;
break;
#endif
#if(PORT_JUMP == 1)
read_reg = Read_CS1237_Config();
Set_CS1237_Config((read_reg & 0xFC) | CH_SEL_JUMP);
CS1237Port = CH_SEL_JUMP;
BuildDelay = true;
break;
#endif
}
if(CS1237Port == CH_SEL_TEMP){
#if(PORT_JUMP == 1)
read_reg = Read_CS1238_Config();
Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_JUMP);
CS1238Port = CH_SEL_JUMP;
BuildDelay = true;
break;
#endif
#if(PORT_A == 1)
read_reg = Read_CS1237_Config();
Set_CS1237_Config((read_reg & 0xFC) | CH_SEL_A);
CS1237Port = CH_SEL_A;
BuildDelay = true;
break;
#endif
}
if(CS1237Port == CH_SEL_JUMP){
#if(PORT_A == 1)
read_reg = Read_CS1237_Config();
Set_CS1237_Config((read_reg & 0xFC) | CH_SEL_A);
CS1237Port = CH_SEL_A;
BuildDelay = true;
break;
#endif
#if(PORT_TEMP == 1)
read_reg = Read_CS1237_Config();
Set_CS1237_Config((read_reg & 0xFC) | CH_SEL_TEMP);
CS1237Port = CH_SEL_TEMP;
BuildDelay = true;
break;
#endif
}
break;}
case CS1237_STATUS_STOP:{
//CS1237Stop();
//LEFTLOW_CS1237Var.Status = CS1237_STATUS_IDLE;
LEFTLOW_CS1237Var.Status = CS1237_STATUS_START;//持续工作
break;}
}
}
void LEFTLOW_CS12371mSRoutine(void)
{
if(LEFTLOW_CS1237Var.CS1237Delay1mSCnt > 0)
LEFTLOW_CS1237Var.CS1237Delay1mSCnt--;
}
void LEFTLOW_CS1238Start(void)
{
CS1237_WakeUp();
CS1237_1MS(2);
BuildDelay = true;
LEFTLOW_CS1237IntEnable();
if(!InitFlag){
LEFTLOW_CS1237_Init();
return;
}
LEFTLOW_CS1237Var.Status = CS1237_STATUS_START;
}
void LEFTLOW_CS1237Stop(void)
{
LEFTLOW_CS1237IntDisable();
CS1237_Sleep();
}
Project/HC32F460/source/Module/CS1237/CS1237_LEFTLOW.h
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#include "bsp.h"
#ifndef _CS1237_LEFTLOW_H_
#define _CS1237_LEFTLOW_H_
#define READ_CONFIG_CMD 0x56
#define WRITE_CONFIG_CMD 0x65
#define CONFIG_RST 0x0C
#define REFO_OFF 0x40
#define REFO_ON 0x00
#define SPEED_SEL_10Hz 0x00
#define SPEED_SEL_40Hz 0x10
#define SPEED_SEL_640Hz 0x20
#define SPEED_SEL6_1280Hz 0x30
#define PGA_SEL_1 0x00
#define PGA_SEL_2 0x04
#define PGA_SEL_64 0x08
#define PGA_SEL_128 0x0C
#define CH_SEL_A 0x00
//#define CH_SEL_B 0x01
#define CH_SEL_TEMP 0x02
#define CH_SEL_JUMP 0x03
#define CS1237_DOUT_OUT() SetBit(((uint32_t)&M0P_GPIO->PADIR + LEFTLOW_CS1237_DOUT_PORTx), LEFTLOW_CS1237_DOUT_PINx, 0)
#define CS1237_DOUT_IN() SetBit(((uint32_t)&M0P_GPIO->PADIR + LEFTLOW_CS1237_DOUT_PORTx), LEFTLOW_CS1237_DOUT_PINx, 1)
#define CS1237_DOUT_H() SET_LEFTLOW_CS1237_DOUT()
#define CS1237_DOUT_L() CLR_LEFTLOW_CS1237_DOUT()
#define CS1237_SCLK_H() SET_LEFTLOW_CS1237_SCLK()
#define CS1237_SCLK_L() CLR_LEFTLOW_CS1237_SCLK()
#define CS1237_1US(x) delay_us(x) //1us延时
#define CS1237_100NS(x) delay_ns(x) //100ns延时
#define CS1237_1MS(x) delay_ms(x) //1ms延时
/*Definition of conversion time corresponding to repeatability setting*/
/*
10Hz //建立时间300ms
40Hz //建立时间75ms
640Hz //建立时间6.25ms
1280Hz //建立时间3.125ms
*/
#define tCon_10Hz 300 /* ms. */
#define tCon_40Hz 75 /* ms. */
#define tCon_640Hz 7 /* ms. */
#define tCon_1280Hz 4 /* ms. */
#define PORT_A 1 //采集通道A
//#define PORT_B 1 //采集通道B
#define PORT_TEMP 0 //采集温度
#define PORT_JUMP 0 //内短采集
#define PACK_NUM 10 //一次采集的数据包数量
#define FILTER_NUM 4 //滤波数
typedef enum{
CS1237_STATUS_IDLE,
CS1237_STATUS_START,
CS1237_STATUS_DELAY,
CS1237_STATUS_READ,
CS1237_STATUS_WAIT_READ,
CS1237_STATUS_CH_SEL,
CS1237_STATUS_STOP,
}CS1237Status_m;
typedef struct{
CS1237Status_m Status;
uint32_t CS1237Delay1mSCnt;
int32_t AinA_AD;//AINAad数据
//int32_t Ain2_AD;//AIN2ad数据
int32_t Temp_AD;//温度ad数据
int32_t Jump_AD;//内短ad数据
}
LEFTLOW_CS1237Var_t;
extern LEFTLOW_CS1237Var_t LEFTLOW_CS1237Var;
void LEFTLOW_CS1237_Init(void);
void LEFTLOW_CS1237_IrqCallBack(void);
void LEFTLOW_CS1237DataLoopCollect(void);
void LEFTLOW_CS1237LoopHandler(void);
void LEFTLOW_CS12371mSRoutine(void);
void LEFTLOW_CS1237Start(void);
void LEFTLOW_CS1237Stop(void);
#endif
Project/HC32F460/source/Module/CS1237/CS1237_LEFTUP.c
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#include "CS1238.h"
#include "UartDebug.h"
#include "bsp.h"
#include "main.h"
#include "Algorithm.h"
CS1238Var_t CS1238Var;
static bool InitFlag;
static bool CS1238IrqFlag;
static bool BuildDelay;
static uint8_t CS1238Port;
static uint8_t CS1238Hz;
static uint8_t CS1238PGA;
extern void CS1238Ain1DataProcessCallBack(int32_t AD);
extern void CS1238Ain2DataProcessCallBack(int32_t AD);
extern void CS1238TempDataProcessCallBack(int32_t AD);
extern void CS1238JumpDataProcessCallBack(int32_t AD);
/** cs1238 时序时钟*/
static void CS1238_Clock(void)
{
CS1238_SCLK_H();
CS1238_100NS(3);
CS1238_SCLK_L();
CS1238_100NS(3);
}
/** cs1238 休眠*/
static void CS1238_Sleep(void)
{
CS1238_SCLK_H();
CS1238_1US(150);
}
/** cs1238 唤醒*/
static void CS1238_WakeUp(void)
{
CS1238_SCLK_L();
CS1238_1US(20);
}
/**设置CS1238寄存器*/
static void Set_CS1238_Config(uint8_t ad_reg)
{
uint16_t bit_cout = 0;
uint8_t reg_temp = 0x00;
//DOUT由高变低之后开始读取数据
CS1238_DOUT_OUT();
CS1238_DOUT_H();
CS1238_DOUT_IN();
CS1238_SCLK_L(); //时钟拉低
CS1238Var.CS1238Delay1mSCnt = 300;
CS1238IrqFlag = false;
while(CS1238IrqFlag == false) //等待芯片准备好
{
if(CS1238Var.CS1238Delay1mSCnt <= 0){
DBG_LOG("CS1238 Preparation Timeout...\r\n");
return; // 超时退出
}
}
CS1238IntDisable();
CS1238IrqFlag = false;
/* clk1-clk26 写期间不需要操作*/
for (bit_cout = 0; bit_cout < 26; bit_cout++)
{
CS1238_Clock(); //给一周期时钟
}
/* clk27 DOUT输出拉高*/
CS1238_Clock(); //给一周期时钟
CS1238_DOUT_H();
/* clk28 - clk29 发送写寄存器命令字 */
CS1238_Clock(); //给一周期时钟
CS1238_Clock(); //给一周期时钟
/* clk30 - clk36 发送写寄存器命令字 */
CS1238_DOUT_OUT();
reg_temp = WRITE_CONFIG_CMD << 1; //命令长度为 7bits (写0x65)左移1位
for (bit_cout = 0; bit_cout < 7; bit_cout++)
{
if (reg_temp & 0x80) //MSB
{
CS1238_DOUT_H();
}
else
{
CS1238_DOUT_L();
}
reg_temp = reg_temp << 1;
CS1238_Clock();
}
/* clk37写寄存器模式还是输出 */
CS1238_Clock();
/* clk38 ~ clk45 写入寄存器值 */
reg_temp = ad_reg;//要配件的寄存器数值
for (bit_cout = 0; bit_cout < 8; bit_cout++)
{
if (reg_temp & 0x80) //MSB
{
CS1238_DOUT_H();
}
else
{
CS1238_DOUT_L();
}
reg_temp = reg_temp << 1;
CS1238_Clock();
}
/* 8: clk46 */
CS1238_Clock();
CS1238_DOUT_H();
CS1238_DOUT_IN();
CS1238IntEnable();
return ;
}
/**读CS1238寄存器*/
static int32_t Read_CS1238_Config(void)
{
uint16_t bit_cout = 0;
uint8_t reg_temp = 0x00;
//DOUT由高变低之后开始读取数据
CS1238_DOUT_OUT();
CS1238_DOUT_H();
CS1238_DOUT_IN();
CS1238_SCLK_L(); //时钟拉低
CS1238Var.CS1238Delay1mSCnt = 300;
CS1238IrqFlag = false;
while(CS1238IrqFlag == false) //等待芯片准备好
{
if(CS1238Var.CS1238Delay1mSCnt <= 0){
DBG_LOG("CS1238 Preparation Timeout...\r\n");
return 0; // 超时退出
}
}
CS1238IntDisable();
CS1238IrqFlag = false;
/* clk1-clk26 写期间不需要操作*/
for (bit_cout = 0; bit_cout < 26; bit_cout++)
{
CS1238_Clock(); //给一周期时钟
}
/* clk27 DOUT输出拉高*/
CS1238_Clock(); //给一周期时钟
CS1238_DOUT_H();
/* clk28 - clk29 发送写寄存器命令字 */
CS1238_Clock(); //给一周期时钟
CS1238_Clock(); //给一周期时钟
/* clk30 - clk36 发送读寄存器命令字 */
CS1238_DOUT_OUT();
reg_temp = READ_CONFIG_CMD << 1; //命令长度为 7bits (写0x56)左移1位
for (bit_cout = 0; bit_cout < 7; bit_cout++)
{
if (reg_temp & 0x80) //MSB
{
CS1238_DOUT_H();
}
else
{
CS1238_DOUT_L();
}
reg_temp = reg_temp << 1;
CS1238_Clock();
}
/* clk37，读寄存器模式改输入 */
CS1238_Clock();
CS1238_DOUT_IN();
for (bit_cout = 0; bit_cout < 8; bit_cout++)
{
CS1238_SCLK_H();
reg_temp <<= 1; //左移1位准备接受数据 初始默认0
CS1238_100NS(3);//延时300ns
if(GET_CS1238_DOUT() == true) //有数值则累加
reg_temp |= 1;
CS1238_SCLK_L();
CS1238_100NS(3);
}
/* 8: clk46 */
CS1238_Clock();
CS1238_DOUT_IN();
CS1238_DOUT_H();
CS1238IntEnable();
return reg_temp ;
}
/**读取CS1238的AD数*/
static int32_t Read_CS1238_Ad_Data(void)
{
uint16_t bit_cout = 0;
int32_t data_temp = 0;
/* clk1 ~ clk24 ADC数据*/
data_temp = 0;
for (bit_cout = 0; bit_cout < 24; bit_cout++)
{
CS1238_SCLK_H();
data_temp <<= 1; //左移1位准备接受数据 初始默认0
CS1238_100NS(3);//延时300ns
if(GET_CS1238_DOUT() == true) //有数值则累加
data_temp |= 1;
CS1238_SCLK_L();
CS1238_100NS(3);
}
/* clk25 ~ clk27 */
for (bit_cout = 24; bit_cout < 27; bit_cout++)
{
CS1238_Clock(); //给一周期时钟
}
CS1238_DOUT_H();
CS1238_SCLK_L();
if(data_temp > 0x7FFFFF) //取24位
{
data_temp |= 0xFF000000;
}
return data_temp;
}
void CS1238_IrqCallBack(void)
{
CS1238IrqFlag = true;
}
void CS1238_Init(void)
{
CS1238IrqFlag = false;
BuildDelay = false;
CS1238IntEnable();
CS1238Var.Ain1_AD = 0;
CS1238Var.Ain2_AD = 0;
CS1238Var.Temp_AD = 0;
CS1238Var.Jump_AD = 0;
CS1238Port = CH_SEL_A;
CS1238Hz = SPEED_SEL_640Hz;
CS1238PGA = PGA_SEL_128;
uint8_t read_reg = 0x00;
uint8_t set_reg = REFO_ON | CS1238Hz | CS1238PGA | CS1238Port;
CS1238_1MS(20);
Set_CS1238_Config(set_reg);
CS1238_1MS(20);
read_reg = Read_CS1238_Config();
CS1238_1MS(20);
if(read_reg != set_reg){
DBG_LOG("CS1238 Init ERR...\r\n");
DBG_LOG("set_reg = %02X\tread_reg = %02X\r\n",set_reg,read_reg);
InitFlag = false;
}
else {
DBG_LOG("CS1238 Init OK...\r\n");
//DBG_LOG("set_reg = %02X\tread_reg = %02X\r\n",set_reg,read_reg);
CS1238Port = read_reg & 0x03;
InitFlag = true;
}
}
void CS1238DataLoopCollect(void)
{
static int32_t ad_array[PACK_NUM];
static uint8_t adcnt;
static uint8_t TimeOutmagcnt;
switch(CS1238Var.Status) {
case CS1238_STATUS_IDLE:{
break;}
case CS1238_STATUS_START:{
memset(&ad_array, 0x00, sizeof(ad_array));
adcnt = 0;
TimeOutmagcnt = 0;
memset(&CS1238Var, NULL, sizeof(CS1238Var));
if(BuildDelay == true)
{
BuildDelay = false;
if(CS1238Hz == SPEED_SEL_10Hz){
CS1238Var.CS1238Delay1mSCnt = tCon_10Hz;
}
if(CS1238Hz == SPEED_SEL_40Hz){
CS1238Var.CS1238Delay1mSCnt = tCon_40Hz;
}
if(CS1238Hz == SPEED_SEL_640Hz){
CS1238Var.CS1238Delay1mSCnt = tCon_640Hz;
}
if(CS1238Hz == SPEED_SEL6_1280Hz){
CS1238Var.CS1238Delay1mSCnt = tCon_1280Hz;
}
CS1238Var.Status = CS1238_STATUS_DELAY;
}
else
{
CS1238Var.Status = CS1238_STATUS_READ;
}
break;}
case CS1238_STATUS_DELAY:{
if(CS1238Var.CS1238Delay1mSCnt <= 0){
CS1238Var.Status = CS1238_STATUS_READ;
}
break;}
case CS1238_STATUS_READ:{
CS1238IrqFlag = false;
CS1238Var.CS1238Delay1mSCnt = 100;
CS1238Var.Status = CS1238_STATUS_WAIT_READ;
break;}
case CS1238_STATUS_WAIT_READ:{
if(CS1238Var.CS1238Delay1mSCnt <= 0){
CS1238Var.Status = CS1238_STATUS_READ;
TimeOutmagcnt++;
}
if(CS1238IrqFlag == true){
CS1238IrqFlag = false;
ad_array[adcnt++] = Read_CS1238_Ad_Data();
CS1238Var.Status = CS1238_STATUS_READ;
}
if(TimeOutmagcnt >= PACK_NUM){
TimeOutmagcnt = 0;
if(adcnt > 0){
if(CS1238Port == CH_SEL_A){
CS1238Var.Ain1_AD = IntFilter_32t(ad_array, adcnt, 4);
CS1238Ain1DataProcessCallBack(CS1238Var.Ain1_AD);
}
if(CS1238Port == CH_SEL_B){
CS1238Var.Ain2_AD = IntFilter_32t(ad_array, adcnt, 4);
CS1238Ain2DataProcessCallBack(CS1238Var.Ain2_AD);
}
if(CS1238Port == CH_SEL_TEMP){
CS1238Var.Temp_AD = IntFilter_32t(ad_array, adcnt, 4);
CS1238TempDataProcessCallBack(CS1238Var.Temp_AD);
}
if(CS1238Port == CH_SEL_JUMP){
CS1238Var.Jump_AD = IntFilter_32t(ad_array, adcnt, 4);
CS1238JumpDataProcessCallBack(CS1238Var.Jump_AD);
}
CS1238Var.Status = CS1238_STATUS_CH_SEL;
}
else{
if(CS1238Port == CH_SEL_A){
DBG_LOG("CS1238 CHA TimeOut...\r\n");
}
if(CS1238Port == CH_SEL_B){
DBG_LOG("CS1238 CHB TimeOut...\r\n");
}
if(CS1238Port == CH_SEL_TEMP){
DBG_LOG("CS1238 Temp TimeOut...\r\n");
}
if(CS1238Port == CH_SEL_JUMP){
DBG_LOG("CS1238 Jump TimeOut...\r\n");
}
CS1238Var.Status = CS1238_STATUS_CH_SEL;
}
}
if(adcnt >= PACK_NUM){
if(CS1238Port == CH_SEL_A){
CS1238Var.Ain1_AD = IntFilter_32t(ad_array, adcnt, 4);
CS1238Ain1DataProcessCallBack(CS1238Var.Ain1_AD);
}
if(CS1238Port == CH_SEL_B){
CS1238Var.Ain2_AD = IntFilter_32t(ad_array, adcnt, 4);
CS1238Ain2DataProcessCallBack(CS1238Var.Ain2_AD);
}
if(CS1238Port == CH_SEL_TEMP){
CS1238Var.Temp_AD = IntFilter_32t(ad_array, adcnt, 4);
CS1238TempDataProcessCallBack(CS1238Var.Temp_AD);
}
if(CS1238Port == CH_SEL_JUMP){
CS1238Var.Jump_AD = IntFilter_32t(ad_array, adcnt, 4);
CS1238JumpDataProcessCallBack(CS1238Var.Jump_AD);
}
CS1238Var.Status = CS1238_STATUS_CH_SEL;
}
break;}
case CS1238_STATUS_CH_SEL:{
CS1238Var.Status = CS1238_STATUS_STOP;
BuildDelay = false;
uint8_t read_reg;
if(CS1238Port == CH_SEL_A){
#if(PORT_TEMP == 1)
read_reg = Read_CS1238_Config();
Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_TEMP);
CS1238Port = CH_SEL_TEMP;
BuildDelay = true;
break;
#endif
#if(PORT_JUMP == 1)
read_reg = Read_CS1238_Config();
Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_JUMP);
CS1238Port = CH_SEL_JUMP;
BuildDelay = true;
break;
#endif
}
if(CS1238Port == CH_SEL_B){
#if(PORT_TEMP == 1)
read_reg = Read_CS1238_Config();
Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_TEMP);
CS1238Port = CH_SEL_TEMP;
BuildDelay = true;
break;
#endif
#if(PORT_JUMP == 1)
read_reg = Read_CS1238_Config();
Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_JUMP);
CS1238Port = CH_SEL_JUMP;
BuildDelay = true;
break;
#endif
#if(PORT_A == 1)
read_reg = Read_CS1238_Config();
Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_A);
CS1238Port = CH_SEL_A;
BuildDelay = true;
break;
#endif
}
if(CS1238Port == CH_SEL_TEMP){
#if(PORT_JUMP == 1)
read_reg = Read_CS1238_Config();
Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_JUMP);
CS1238Port = CH_SEL_JUMP;
BuildDelay = true;
break;
#endif
#if(PORT_A == 1)
read_reg = Read_CS1238_Config();
Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_A);
CS1238Port = CH_SEL_A;
BuildDelay = true;
break;
#endif
}
if(CS1238Port == CH_SEL_JUMP){
#if(PORT_A == 1)
read_reg = Read_CS1238_Config();
Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_A);
CS1238Port = CH_SEL_A;
BuildDelay = true;
break;
#endif
#if(PORT_TEMP == 1)
read_reg = Read_CS1238_Config();
Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_TEMP);
CS1238Port = CH_SEL_TEMP;
BuildDelay = true;
break;
#endif
}
break;}
case CS1238_STATUS_STOP:{
//CS1238Stop();
//CS1238Var.Status = CS1238_STATUS_IDLE;
CS1238Var.Status = CS1238_STATUS_START;//持续工作
break;}
}
}
void CS12381mSRoutine(void)
{
if(CS1238Var.CS1238Delay1mSCnt > 0)
CS1238Var.CS1238Delay1mSCnt--;
}
void CS1238Start(void)
{
CS1238_WakeUp();
CS1238_1MS(2);
BuildDelay = true;
CS1238IntEnable();
if(!InitFlag){
CS1238_Init();
return;
}
CS1238Var.Status = CS1238_STATUS_START;
}
void CS1238Stop(void)
{
CS1238IntDisable();
CS1238_Sleep();
}
Project/HC32F460/source/Module/CS1237/CS1237_LEFTUP.h
+91
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#include "bsp.h"
#ifndef _CS1238_H_
#define _CS1238_H_
#define READ_CONFIG_CMD 0x56
#define WRITE_CONFIG_CMD 0x65
#define CONFIG_RST 0x0C
#define REFO_OFF 0x40
#define REFO_ON 0x00
#define SPEED_SEL_10Hz 0x00
#define SPEED_SEL_40Hz 0x10
#define SPEED_SEL_640Hz 0x20
#define SPEED_SEL6_1280Hz 0x30
#define PGA_SEL_1 0x00
#define PGA_SEL_2 0x04
#define PGA_SEL_64 0x08
#define PGA_SEL_128 0x0C
#define CH_SEL_A 0x00
#define CH_SEL_B 0x01
#define CH_SEL_TEMP 0x02
#define CH_SEL_JUMP 0x03
#define CS1238_DOUT_OUT() SetBit(((uint32_t)&M0P_GPIO->PADIR + CS1238_DOUT_PORTx), CS1238_DOUT_PINx, 0)
#define CS1238_DOUT_IN() SetBit(((uint32_t)&M0P_GPIO->PADIR + CS1238_DOUT_PORTx), CS1238_DOUT_PINx, 1)
#define CS1238_DOUT_H() SET_CS1238_DOUT()
#define CS1238_DOUT_L() CLR_CS1238_DOUT()
#define CS1238_SCLK_H() SET_CS1238_SCLK()
#define CS1238_SCLK_L() CLR_CS1238_SCLK()
#define CS1238_1US(x) delay_us(x) //1us延时
#define CS1238_100NS(x) delay_ns(x) //100ns延时
#define CS1238_1MS(x) delay_ms(x) //1ms延时
/*Definition of conversion time corresponding to repeatability setting*/
/*
10Hz //建立时间300ms
40Hz //建立时间75ms
640Hz //建立时间6.25ms
1280Hz //建立时间3.125ms
*/
#define tCon_10Hz 300 /* ms. */
#define tCon_40Hz 75 /* ms. */
#define tCon_640Hz 7 /* ms. */
#define tCon_1280Hz 4 /* ms. */
#define PORT_A 1 //采集通道A
#define PORT_B 1 //采集通道B
#define PORT_TEMP 0 //采集温度
#define PORT_JUMP 0 //内短采集
#define PACK_NUM 10 //一次采集的数据包数量
typedef enum{
CS1238_STATUS_IDLE,
CS1238_STATUS_START,
CS1238_STATUS_DELAY,
CS1238_STATUS_READ,
CS1238_STATUS_WAIT_READ,
CS1238_STATUS_CH_SEL,
CS1238_STATUS_STOP,
}CS1238Status_m;
typedef struct{
CS1238Status_m Status;
uint32_t CS1238Delay1mSCnt;
int32_t Ain1_AD;//AIN1ad数据
int32_t Ain2_AD;//AIN2ad数据
int32_t Temp_AD;//温度ad数据
int32_t Jump_AD;//内短ad数据
}
CS1238Var_t;
extern CS1238Var_t CS1238Var;
void CS1238_Init(void);
void CS1238_IrqCallBack(void);
void CS1238DataLoopCollect(void);
void CS1238LoopHandler(void);
void CS12381mSRoutine(void);
void CS1238Start(void);
void CS1238Stop(void);
#endif
Project/HC32F460/source/Module/CS1237/CS1237_RIGHRLOW.c
+485
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#include "CS1238.h"
#include "UartDebug.h"
#include "bsp.h"
#include "main.h"
#include "Algorithm.h"
CS1238Var_t CS1238Var;
static bool InitFlag;
static bool CS1238IrqFlag;
static bool BuildDelay;
static uint8_t CS1238Port;
static uint8_t CS1238Hz;
static uint8_t CS1238PGA;
extern void CS1238Ain1DataProcessCallBack(int32_t AD);
extern void CS1238Ain2DataProcessCallBack(int32_t AD);
extern void CS1238TempDataProcessCallBack(int32_t AD);
extern void CS1238JumpDataProcessCallBack(int32_t AD);
/** cs1238 时序时钟*/
static void CS1238_Clock(void)
{
CS1238_SCLK_H();
CS1238_100NS(3);
CS1238_SCLK_L();
CS1238_100NS(3);
}
/** cs1238 休眠*/
static void CS1238_Sleep(void)
{
CS1238_SCLK_H();
CS1238_1US(150);
}
/** cs1238 唤醒*/
static void CS1238_WakeUp(void)
{
CS1238_SCLK_L();
CS1238_1US(20);
}
/**设置CS1238寄存器*/
static void Set_CS1238_Config(uint8_t ad_reg)
{
uint16_t bit_cout = 0;
uint8_t reg_temp = 0x00;
//DOUT由高变低之后开始读取数据
CS1238_DOUT_OUT();
CS1238_DOUT_H();
CS1238_DOUT_IN();
CS1238_SCLK_L(); //时钟拉低
CS1238Var.CS1238Delay1mSCnt = 300;
CS1238IrqFlag = false;
while(CS1238IrqFlag == false) //等待芯片准备好
{
if(CS1238Var.CS1238Delay1mSCnt <= 0){
DBG_LOG("CS1238 Preparation Timeout...\r\n");
return; // 超时退出
}
}
CS1238IntDisable();
CS1238IrqFlag = false;
/* clk1-clk26 写期间不需要操作*/
for (bit_cout = 0; bit_cout < 26; bit_cout++)
{
CS1238_Clock(); //给一周期时钟
}
/* clk27 DOUT输出拉高*/
CS1238_Clock(); //给一周期时钟
CS1238_DOUT_H();
/* clk28 - clk29 发送写寄存器命令字 */
CS1238_Clock(); //给一周期时钟
CS1238_Clock(); //给一周期时钟
/* clk30 - clk36 发送写寄存器命令字 */
CS1238_DOUT_OUT();
reg_temp = WRITE_CONFIG_CMD << 1; //命令长度为 7bits (写0x65)左移1位
for (bit_cout = 0; bit_cout < 7; bit_cout++)
{
if (reg_temp & 0x80) //MSB
{
CS1238_DOUT_H();
}
else
{
CS1238_DOUT_L();
}
reg_temp = reg_temp << 1;
CS1238_Clock();
}
/* clk37写寄存器模式还是输出 */
CS1238_Clock();
/* clk38 ~ clk45 写入寄存器值 */
reg_temp = ad_reg;//要配件的寄存器数值
for (bit_cout = 0; bit_cout < 8; bit_cout++)
{
if (reg_temp & 0x80) //MSB
{
CS1238_DOUT_H();
}
else
{
CS1238_DOUT_L();
}
reg_temp = reg_temp << 1;
CS1238_Clock();
}
/* 8: clk46 */
CS1238_Clock();
CS1238_DOUT_H();
CS1238_DOUT_IN();
CS1238IntEnable();
return ;
}
/**读CS1238寄存器*/
static int32_t Read_CS1238_Config(void)
{
uint16_t bit_cout = 0;
uint8_t reg_temp = 0x00;
//DOUT由高变低之后开始读取数据
CS1238_DOUT_OUT();
CS1238_DOUT_H();
CS1238_DOUT_IN();
CS1238_SCLK_L(); //时钟拉低
CS1238Var.CS1238Delay1mSCnt = 300;
CS1238IrqFlag = false;
while(CS1238IrqFlag == false) //等待芯片准备好
{
if(CS1238Var.CS1238Delay1mSCnt <= 0){
DBG_LOG("CS1238 Preparation Timeout...\r\n");
return 0; // 超时退出
}
}
CS1238IntDisable();
CS1238IrqFlag = false;
/* clk1-clk26 写期间不需要操作*/
for (bit_cout = 0; bit_cout < 26; bit_cout++)
{
CS1238_Clock(); //给一周期时钟
}
/* clk27 DOUT输出拉高*/
CS1238_Clock(); //给一周期时钟
CS1238_DOUT_H();
/* clk28 - clk29 发送写寄存器命令字 */
CS1238_Clock(); //给一周期时钟
CS1238_Clock(); //给一周期时钟
/* clk30 - clk36 发送读寄存器命令字 */
CS1238_DOUT_OUT();
reg_temp = READ_CONFIG_CMD << 1; //命令长度为 7bits (写0x56)左移1位
for (bit_cout = 0; bit_cout < 7; bit_cout++)
{
if (reg_temp & 0x80) //MSB
{
CS1238_DOUT_H();
}
else
{
CS1238_DOUT_L();
}
reg_temp = reg_temp << 1;
CS1238_Clock();
}
/* clk37，读寄存器模式改输入 */
CS1238_Clock();
CS1238_DOUT_IN();
for (bit_cout = 0; bit_cout < 8; bit_cout++)
{
CS1238_SCLK_H();
reg_temp <<= 1; //左移1位准备接受数据 初始默认0
CS1238_100NS(3);//延时300ns
if(GET_CS1238_DOUT() == true) //有数值则累加
reg_temp |= 1;
CS1238_SCLK_L();
CS1238_100NS(3);
}
/* 8: clk46 */
CS1238_Clock();
CS1238_DOUT_IN();
CS1238_DOUT_H();
CS1238IntEnable();
return reg_temp ;
}
/**读取CS1238的AD数*/
static int32_t Read_CS1238_Ad_Data(void)
{
uint16_t bit_cout = 0;
int32_t data_temp = 0;
/* clk1 ~ clk24 ADC数据*/
data_temp = 0;
for (bit_cout = 0; bit_cout < 24; bit_cout++)
{
CS1238_SCLK_H();
data_temp <<= 1; //左移1位准备接受数据 初始默认0
CS1238_100NS(3);//延时300ns
if(GET_CS1238_DOUT() == true) //有数值则累加
data_temp |= 1;
CS1238_SCLK_L();
CS1238_100NS(3);
}
/* clk25 ~ clk27 */
for (bit_cout = 24; bit_cout < 27; bit_cout++)
{
CS1238_Clock(); //给一周期时钟
}
CS1238_DOUT_H();
CS1238_SCLK_L();
if(data_temp > 0x7FFFFF) //取24位
{
data_temp |= 0xFF000000;
}
return data_temp;
}
void CS1238_IrqCallBack(void)
{
CS1238IrqFlag = true;
}
void CS1238_Init(void)
{
CS1238IrqFlag = false;
BuildDelay = false;
CS1238IntEnable();
CS1238Var.Ain1_AD = 0;
CS1238Var.Ain2_AD = 0;
CS1238Var.Temp_AD = 0;
CS1238Var.Jump_AD = 0;
CS1238Port = CH_SEL_A;
CS1238Hz = SPEED_SEL_640Hz;
CS1238PGA = PGA_SEL_128;
uint8_t read_reg = 0x00;
uint8_t set_reg = REFO_ON | CS1238Hz | CS1238PGA | CS1238Port;
CS1238_1MS(20);
Set_CS1238_Config(set_reg);
CS1238_1MS(20);
read_reg = Read_CS1238_Config();
CS1238_1MS(20);
if(read_reg != set_reg){
DBG_LOG("CS1238 Init ERR...\r\n");
DBG_LOG("set_reg = %02X\tread_reg = %02X\r\n",set_reg,read_reg);
InitFlag = false;
}
else {
DBG_LOG("CS1238 Init OK...\r\n");
//DBG_LOG("set_reg = %02X\tread_reg = %02X\r\n",set_reg,read_reg);
CS1238Port = read_reg & 0x03;
InitFlag = true;
}
}
void CS1238DataLoopCollect(void)
{
static int32_t ad_array[PACK_NUM];
static uint8_t adcnt;
static uint8_t TimeOutmagcnt;
switch(CS1238Var.Status) {
case CS1238_STATUS_IDLE:{
break;}
case CS1238_STATUS_START:{
memset(&ad_array, 0x00, sizeof(ad_array));
adcnt = 0;
TimeOutmagcnt = 0;
memset(&CS1238Var, NULL, sizeof(CS1238Var));
if(BuildDelay == true)
{
BuildDelay = false;
if(CS1238Hz == SPEED_SEL_10Hz){
CS1238Var.CS1238Delay1mSCnt = tCon_10Hz;
}
if(CS1238Hz == SPEED_SEL_40Hz){
CS1238Var.CS1238Delay1mSCnt = tCon_40Hz;
}
if(CS1238Hz == SPEED_SEL_640Hz){
CS1238Var.CS1238Delay1mSCnt = tCon_640Hz;
}
if(CS1238Hz == SPEED_SEL6_1280Hz){
CS1238Var.CS1238Delay1mSCnt = tCon_1280Hz;
}
CS1238Var.Status = CS1238_STATUS_DELAY;
}
else
{
CS1238Var.Status = CS1238_STATUS_READ;
}
break;}
case CS1238_STATUS_DELAY:{
if(CS1238Var.CS1238Delay1mSCnt <= 0){
CS1238Var.Status = CS1238_STATUS_READ;
}
break;}
case CS1238_STATUS_READ:{
CS1238IrqFlag = false;
CS1238Var.CS1238Delay1mSCnt = 100;
CS1238Var.Status = CS1238_STATUS_WAIT_READ;
break;}
case CS1238_STATUS_WAIT_READ:{
if(CS1238Var.CS1238Delay1mSCnt <= 0){
CS1238Var.Status = CS1238_STATUS_READ;
TimeOutmagcnt++;
}
if(CS1238IrqFlag == true){
CS1238IrqFlag = false;
ad_array[adcnt++] = Read_CS1238_Ad_Data();
CS1238Var.Status = CS1238_STATUS_READ;
}
if(TimeOutmagcnt >= PACK_NUM){
TimeOutmagcnt = 0;
if(adcnt > 0){
if(CS1238Port == CH_SEL_A){
CS1238Var.Ain1_AD = IntFilter_32t(ad_array, adcnt, 4);
CS1238Ain1DataProcessCallBack(CS1238Var.Ain1_AD);
}
if(CS1238Port == CH_SEL_B){
CS1238Var.Ain2_AD = IntFilter_32t(ad_array, adcnt, 4);
CS1238Ain2DataProcessCallBack(CS1238Var.Ain2_AD);
}
if(CS1238Port == CH_SEL_TEMP){
CS1238Var.Temp_AD = IntFilter_32t(ad_array, adcnt, 4);
CS1238TempDataProcessCallBack(CS1238Var.Temp_AD);
}
if(CS1238Port == CH_SEL_JUMP){
CS1238Var.Jump_AD = IntFilter_32t(ad_array, adcnt, 4);
CS1238JumpDataProcessCallBack(CS1238Var.Jump_AD);
}
CS1238Var.Status = CS1238_STATUS_CH_SEL;
}
else{
if(CS1238Port == CH_SEL_A){
DBG_LOG("CS1238 CHA TimeOut...\r\n");
}
if(CS1238Port == CH_SEL_B){
DBG_LOG("CS1238 CHB TimeOut...\r\n");
}
if(CS1238Port == CH_SEL_TEMP){
DBG_LOG("CS1238 Temp TimeOut...\r\n");
}
if(CS1238Port == CH_SEL_JUMP){
DBG_LOG("CS1238 Jump TimeOut...\r\n");
}
CS1238Var.Status = CS1238_STATUS_CH_SEL;
}
}
if(adcnt >= PACK_NUM){
if(CS1238Port == CH_SEL_A){
CS1238Var.Ain1_AD = IntFilter_32t(ad_array, adcnt, 4);
CS1238Ain1DataProcessCallBack(CS1238Var.Ain1_AD);
}
if(CS1238Port == CH_SEL_B){
CS1238Var.Ain2_AD = IntFilter_32t(ad_array, adcnt, 4);
CS1238Ain2DataProcessCallBack(CS1238Var.Ain2_AD);
}
if(CS1238Port == CH_SEL_TEMP){
CS1238Var.Temp_AD = IntFilter_32t(ad_array, adcnt, 4);
CS1238TempDataProcessCallBack(CS1238Var.Temp_AD);
}
if(CS1238Port == CH_SEL_JUMP){
CS1238Var.Jump_AD = IntFilter_32t(ad_array, adcnt, 4);
CS1238JumpDataProcessCallBack(CS1238Var.Jump_AD);
}
CS1238Var.Status = CS1238_STATUS_CH_SEL;
}
break;}
case CS1238_STATUS_CH_SEL:{
CS1238Var.Status = CS1238_STATUS_STOP;
BuildDelay = false;
uint8_t read_reg;
if(CS1238Port == CH_SEL_A){
#if(PORT_TEMP == 1)
read_reg = Read_CS1238_Config();
Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_TEMP);
CS1238Port = CH_SEL_TEMP;
BuildDelay = true;
break;
#endif
#if(PORT_JUMP == 1)
read_reg = Read_CS1238_Config();
Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_JUMP);
CS1238Port = CH_SEL_JUMP;
BuildDelay = true;
break;
#endif
}
if(CS1238Port == CH_SEL_B){
#if(PORT_TEMP == 1)
read_reg = Read_CS1238_Config();
Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_TEMP);
CS1238Port = CH_SEL_TEMP;
BuildDelay = true;
break;
#endif
#if(PORT_JUMP == 1)
read_reg = Read_CS1238_Config();
Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_JUMP);
CS1238Port = CH_SEL_JUMP;
BuildDelay = true;
break;
#endif
#if(PORT_A == 1)
read_reg = Read_CS1238_Config();
Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_A);
CS1238Port = CH_SEL_A;
BuildDelay = true;
break;
#endif
}
if(CS1238Port == CH_SEL_TEMP){
#if(PORT_JUMP == 1)
read_reg = Read_CS1238_Config();
Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_JUMP);
CS1238Port = CH_SEL_JUMP;
BuildDelay = true;
break;
#endif
#if(PORT_A == 1)
read_reg = Read_CS1238_Config();
Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_A);
CS1238Port = CH_SEL_A;
BuildDelay = true;
break;
#endif
}
if(CS1238Port == CH_SEL_JUMP){
#if(PORT_A == 1)
read_reg = Read_CS1238_Config();
Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_A);
CS1238Port = CH_SEL_A;
BuildDelay = true;
break;
#endif
#if(PORT_TEMP == 1)
read_reg = Read_CS1238_Config();
Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_TEMP);
CS1238Port = CH_SEL_TEMP;
BuildDelay = true;
break;
#endif
}
break;}
case CS1238_STATUS_STOP:{
//CS1238Stop();
//CS1238Var.Status = CS1238_STATUS_IDLE;
CS1238Var.Status = CS1238_STATUS_START;//持续工作
break;}
}
}
void CS12381mSRoutine(void)
{
if(CS1238Var.CS1238Delay1mSCnt > 0)
CS1238Var.CS1238Delay1mSCnt--;
}
void CS1238Start(void)
{
CS1238_WakeUp();
CS1238_1MS(2);
BuildDelay = true;
CS1238IntEnable();
if(!InitFlag){
CS1238_Init();
return;
}
CS1238Var.Status = CS1238_STATUS_START;
}
void CS1238Stop(void)
{
CS1238IntDisable();
CS1238_Sleep();
}
Project/HC32F460/source/Module/CS1237/CS1237_RIGHRLOW.h
+91
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#include "bsp.h"
#ifndef _CS1238_H_
#define _CS1238_H_
#define READ_CONFIG_CMD 0x56
#define WRITE_CONFIG_CMD 0x65
#define CONFIG_RST 0x0C
#define REFO_OFF 0x40
#define REFO_ON 0x00
#define SPEED_SEL_10Hz 0x00
#define SPEED_SEL_40Hz 0x10
#define SPEED_SEL_640Hz 0x20
#define SPEED_SEL6_1280Hz 0x30
#define PGA_SEL_1 0x00
#define PGA_SEL_2 0x04
#define PGA_SEL_64 0x08
#define PGA_SEL_128 0x0C
#define CH_SEL_A 0x00
#define CH_SEL_B 0x01
#define CH_SEL_TEMP 0x02
#define CH_SEL_JUMP 0x03
#define CS1238_DOUT_OUT() SetBit(((uint32_t)&M0P_GPIO->PADIR + CS1238_DOUT_PORTx), CS1238_DOUT_PINx, 0)
#define CS1238_DOUT_IN() SetBit(((uint32_t)&M0P_GPIO->PADIR + CS1238_DOUT_PORTx), CS1238_DOUT_PINx, 1)
#define CS1238_DOUT_H() SET_CS1238_DOUT()
#define CS1238_DOUT_L() CLR_CS1238_DOUT()
#define CS1238_SCLK_H() SET_CS1238_SCLK()
#define CS1238_SCLK_L() CLR_CS1238_SCLK()
#define CS1238_1US(x) delay_us(x) //1us延时
#define CS1238_100NS(x) delay_ns(x) //100ns延时
#define CS1238_1MS(x) delay_ms(x) //1ms延时
/*Definition of conversion time corresponding to repeatability setting*/
/*
10Hz //建立时间300ms
40Hz //建立时间75ms
640Hz //建立时间6.25ms
1280Hz //建立时间3.125ms
*/
#define tCon_10Hz 300 /* ms. */
#define tCon_40Hz 75 /* ms. */
#define tCon_640Hz 7 /* ms. */
#define tCon_1280Hz 4 /* ms. */
#define PORT_A 1 //采集通道A
#define PORT_B 1 //采集通道B
#define PORT_TEMP 0 //采集温度
#define PORT_JUMP 0 //内短采集
#define PACK_NUM 10 //一次采集的数据包数量
typedef enum{
CS1238_STATUS_IDLE,
CS1238_STATUS_START,
CS1238_STATUS_DELAY,
CS1238_STATUS_READ,
CS1238_STATUS_WAIT_READ,
CS1238_STATUS_CH_SEL,
CS1238_STATUS_STOP,
}CS1238Status_m;
typedef struct{
CS1238Status_m Status;
uint32_t CS1238Delay1mSCnt;
int32_t Ain1_AD;//AIN1ad数据
int32_t Ain2_AD;//AIN2ad数据
int32_t Temp_AD;//温度ad数据
int32_t Jump_AD;//内短ad数据
}
CS1238Var_t;
extern CS1238Var_t CS1238Var;
void CS1238_Init(void);
void CS1238_IrqCallBack(void);
void CS1238DataLoopCollect(void);
void CS1238LoopHandler(void);
void CS12381mSRoutine(void);
void CS1238Start(void);
void CS1238Stop(void);
#endif
Project/HC32F460/source/Module/CS1237/CS1237_RIGHTUP.c
+485
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#include "CS1238.h"
#include "UartDebug.h"
#include "bsp.h"
#include "main.h"
#include "Algorithm.h"
CS1238Var_t CS1238Var;
static bool InitFlag;
static bool CS1238IrqFlag;
static bool BuildDelay;
static uint8_t CS1238Port;
static uint8_t CS1238Hz;
static uint8_t CS1238PGA;
extern void CS1238Ain1DataProcessCallBack(int32_t AD);
extern void CS1238Ain2DataProcessCallBack(int32_t AD);
extern void CS1238TempDataProcessCallBack(int32_t AD);
extern void CS1238JumpDataProcessCallBack(int32_t AD);
/** cs1238 时序时钟*/
static void CS1238_Clock(void)
{
CS1238_SCLK_H();
CS1238_100NS(3);
CS1238_SCLK_L();
CS1238_100NS(3);
}
/** cs1238 休眠*/
static void CS1238_Sleep(void)
{
CS1238_SCLK_H();
CS1238_1US(150);
}
/** cs1238 唤醒*/
static void CS1238_WakeUp(void)
{
CS1238_SCLK_L();
CS1238_1US(20);
}
/**设置CS1238寄存器*/
static void Set_CS1238_Config(uint8_t ad_reg)
{
uint16_t bit_cout = 0;
uint8_t reg_temp = 0x00;
//DOUT由高变低之后开始读取数据
CS1238_DOUT_OUT();
CS1238_DOUT_H();
CS1238_DOUT_IN();
CS1238_SCLK_L(); //时钟拉低
CS1238Var.CS1238Delay1mSCnt = 300;
CS1238IrqFlag = false;
while(CS1238IrqFlag == false) //等待芯片准备好
{
if(CS1238Var.CS1238Delay1mSCnt <= 0){
DBG_LOG("CS1238 Preparation Timeout...\r\n");
return; // 超时退出
}
}
CS1238IntDisable();
CS1238IrqFlag = false;
/* clk1-clk26 写期间不需要操作*/
for (bit_cout = 0; bit_cout < 26; bit_cout++)
{
CS1238_Clock(); //给一周期时钟
}
/* clk27 DOUT输出拉高*/
CS1238_Clock(); //给一周期时钟
CS1238_DOUT_H();
/* clk28 - clk29 发送写寄存器命令字 */
CS1238_Clock(); //给一周期时钟
CS1238_Clock(); //给一周期时钟
/* clk30 - clk36 发送写寄存器命令字 */
CS1238_DOUT_OUT();
reg_temp = WRITE_CONFIG_CMD << 1; //命令长度为 7bits (写0x65)左移1位
for (bit_cout = 0; bit_cout < 7; bit_cout++)
{
if (reg_temp & 0x80) //MSB
{
CS1238_DOUT_H();
}
else
{
CS1238_DOUT_L();
}
reg_temp = reg_temp << 1;
CS1238_Clock();
}
/* clk37写寄存器模式还是输出 */
CS1238_Clock();
/* clk38 ~ clk45 写入寄存器值 */
reg_temp = ad_reg;//要配件的寄存器数值
for (bit_cout = 0; bit_cout < 8; bit_cout++)
{
if (reg_temp & 0x80) //MSB
{
CS1238_DOUT_H();
}
else
{
CS1238_DOUT_L();
}
reg_temp = reg_temp << 1;
CS1238_Clock();
}
/* 8: clk46 */
CS1238_Clock();
CS1238_DOUT_H();
CS1238_DOUT_IN();
CS1238IntEnable();
return ;
}
/**读CS1238寄存器*/
static int32_t Read_CS1238_Config(void)
{
uint16_t bit_cout = 0;
uint8_t reg_temp = 0x00;
//DOUT由高变低之后开始读取数据
CS1238_DOUT_OUT();
CS1238_DOUT_H();
CS1238_DOUT_IN();
CS1238_SCLK_L(); //时钟拉低
CS1238Var.CS1238Delay1mSCnt = 300;
CS1238IrqFlag = false;
while(CS1238IrqFlag == false) //等待芯片准备好
{
if(CS1238Var.CS1238Delay1mSCnt <= 0){
DBG_LOG("CS1238 Preparation Timeout...\r\n");
return 0; // 超时退出
}
}
CS1238IntDisable();
CS1238IrqFlag = false;
/* clk1-clk26 写期间不需要操作*/
for (bit_cout = 0; bit_cout < 26; bit_cout++)
{
CS1238_Clock(); //给一周期时钟
}
/* clk27 DOUT输出拉高*/
CS1238_Clock(); //给一周期时钟
CS1238_DOUT_H();
/* clk28 - clk29 发送写寄存器命令字 */
CS1238_Clock(); //给一周期时钟
CS1238_Clock(); //给一周期时钟
/* clk30 - clk36 发送读寄存器命令字 */
CS1238_DOUT_OUT();
reg_temp = READ_CONFIG_CMD << 1; //命令长度为 7bits (写0x56)左移1位
for (bit_cout = 0; bit_cout < 7; bit_cout++)
{
if (reg_temp & 0x80) //MSB
{
CS1238_DOUT_H();
}
else
{
CS1238_DOUT_L();
}
reg_temp = reg_temp << 1;
CS1238_Clock();
}
/* clk37，读寄存器模式改输入 */
CS1238_Clock();
CS1238_DOUT_IN();
for (bit_cout = 0; bit_cout < 8; bit_cout++)
{
CS1238_SCLK_H();
reg_temp <<= 1; //左移1位准备接受数据 初始默认0
CS1238_100NS(3);//延时300ns
if(GET_CS1238_DOUT() == true) //有数值则累加
reg_temp |= 1;
CS1238_SCLK_L();
CS1238_100NS(3);
}
/* 8: clk46 */
CS1238_Clock();
CS1238_DOUT_IN();
CS1238_DOUT_H();
CS1238IntEnable();
return reg_temp ;
}
/**读取CS1238的AD数*/
static int32_t Read_CS1238_Ad_Data(void)
{
uint16_t bit_cout = 0;
int32_t data_temp = 0;
/* clk1 ~ clk24 ADC数据*/
data_temp = 0;
for (bit_cout = 0; bit_cout < 24; bit_cout++)
{
CS1238_SCLK_H();
data_temp <<= 1; //左移1位准备接受数据 初始默认0
CS1238_100NS(3);//延时300ns
if(GET_CS1238_DOUT() == true) //有数值则累加
data_temp |= 1;
CS1238_SCLK_L();
CS1238_100NS(3);
}
/* clk25 ~ clk27 */
for (bit_cout = 24; bit_cout < 27; bit_cout++)
{
CS1238_Clock(); //给一周期时钟
}
CS1238_DOUT_H();
CS1238_SCLK_L();
if(data_temp > 0x7FFFFF) //取24位
{
data_temp |= 0xFF000000;
}
return data_temp;
}
void CS1238_IrqCallBack(void)
{
CS1238IrqFlag = true;
}
void CS1238_Init(void)
{
CS1238IrqFlag = false;
BuildDelay = false;
CS1238IntEnable();
CS1238Var.Ain1_AD = 0;
CS1238Var.Ain2_AD = 0;
CS1238Var.Temp_AD = 0;
CS1238Var.Jump_AD = 0;
CS1238Port = CH_SEL_A;
CS1238Hz = SPEED_SEL_640Hz;
CS1238PGA = PGA_SEL_128;
uint8_t read_reg = 0x00;
uint8_t set_reg = REFO_ON | CS1238Hz | CS1238PGA | CS1238Port;
CS1238_1MS(20);
Set_CS1238_Config(set_reg);
CS1238_1MS(20);
read_reg = Read_CS1238_Config();
CS1238_1MS(20);
if(read_reg != set_reg){
DBG_LOG("CS1238 Init ERR...\r\n");
DBG_LOG("set_reg = %02X\tread_reg = %02X\r\n",set_reg,read_reg);
InitFlag = false;
}
else {
DBG_LOG("CS1238 Init OK...\r\n");
//DBG_LOG("set_reg = %02X\tread_reg = %02X\r\n",set_reg,read_reg);
CS1238Port = read_reg & 0x03;
InitFlag = true;
}
}
void CS1238DataLoopCollect(void)
{
static int32_t ad_array[PACK_NUM];
static uint8_t adcnt;
static uint8_t TimeOutmagcnt;
switch(CS1238Var.Status) {
case CS1238_STATUS_IDLE:{
break;}
case CS1238_STATUS_START:{
memset(&ad_array, 0x00, sizeof(ad_array));
adcnt = 0;
TimeOutmagcnt = 0;
memset(&CS1238Var, NULL, sizeof(CS1238Var));
if(BuildDelay == true)
{
BuildDelay = false;
if(CS1238Hz == SPEED_SEL_10Hz){
CS1238Var.CS1238Delay1mSCnt = tCon_10Hz;
}
if(CS1238Hz == SPEED_SEL_40Hz){
CS1238Var.CS1238Delay1mSCnt = tCon_40Hz;
}
if(CS1238Hz == SPEED_SEL_640Hz){
CS1238Var.CS1238Delay1mSCnt = tCon_640Hz;
}
if(CS1238Hz == SPEED_SEL6_1280Hz){
CS1238Var.CS1238Delay1mSCnt = tCon_1280Hz;
}
CS1238Var.Status = CS1238_STATUS_DELAY;
}
else
{
CS1238Var.Status = CS1238_STATUS_READ;
}
break;}
case CS1238_STATUS_DELAY:{
if(CS1238Var.CS1238Delay1mSCnt <= 0){
CS1238Var.Status = CS1238_STATUS_READ;
}
break;}
case CS1238_STATUS_READ:{
CS1238IrqFlag = false;
CS1238Var.CS1238Delay1mSCnt = 100;
CS1238Var.Status = CS1238_STATUS_WAIT_READ;
break;}
case CS1238_STATUS_WAIT_READ:{
if(CS1238Var.CS1238Delay1mSCnt <= 0){
CS1238Var.Status = CS1238_STATUS_READ;
TimeOutmagcnt++;
}
if(CS1238IrqFlag == true){
CS1238IrqFlag = false;
ad_array[adcnt++] = Read_CS1238_Ad_Data();
CS1238Var.Status = CS1238_STATUS_READ;
}
if(TimeOutmagcnt >= PACK_NUM){
TimeOutmagcnt = 0;
if(adcnt > 0){
if(CS1238Port == CH_SEL_A){
CS1238Var.Ain1_AD = IntFilter_32t(ad_array, adcnt, 4);
CS1238Ain1DataProcessCallBack(CS1238Var.Ain1_AD);
}
if(CS1238Port == CH_SEL_B){
CS1238Var.Ain2_AD = IntFilter_32t(ad_array, adcnt, 4);
CS1238Ain2DataProcessCallBack(CS1238Var.Ain2_AD);
}
if(CS1238Port == CH_SEL_TEMP){
CS1238Var.Temp_AD = IntFilter_32t(ad_array, adcnt, 4);
CS1238TempDataProcessCallBack(CS1238Var.Temp_AD);
}
if(CS1238Port == CH_SEL_JUMP){
CS1238Var.Jump_AD = IntFilter_32t(ad_array, adcnt, 4);
CS1238JumpDataProcessCallBack(CS1238Var.Jump_AD);
}
CS1238Var.Status = CS1238_STATUS_CH_SEL;
}
else{
if(CS1238Port == CH_SEL_A){
DBG_LOG("CS1238 CHA TimeOut...\r\n");
}
if(CS1238Port == CH_SEL_B){
DBG_LOG("CS1238 CHB TimeOut...\r\n");
}
if(CS1238Port == CH_SEL_TEMP){
DBG_LOG("CS1238 Temp TimeOut...\r\n");
}
if(CS1238Port == CH_SEL_JUMP){
DBG_LOG("CS1238 Jump TimeOut...\r\n");
}
CS1238Var.Status = CS1238_STATUS_CH_SEL;
}
}
if(adcnt >= PACK_NUM){
if(CS1238Port == CH_SEL_A){
CS1238Var.Ain1_AD = IntFilter_32t(ad_array, adcnt, 4);
CS1238Ain1DataProcessCallBack(CS1238Var.Ain1_AD);
}
if(CS1238Port == CH_SEL_B){
CS1238Var.Ain2_AD = IntFilter_32t(ad_array, adcnt, 4);
CS1238Ain2DataProcessCallBack(CS1238Var.Ain2_AD);
}
if(CS1238Port == CH_SEL_TEMP){
CS1238Var.Temp_AD = IntFilter_32t(ad_array, adcnt, 4);
CS1238TempDataProcessCallBack(CS1238Var.Temp_AD);
}
if(CS1238Port == CH_SEL_JUMP){
CS1238Var.Jump_AD = IntFilter_32t(ad_array, adcnt, 4);
CS1238JumpDataProcessCallBack(CS1238Var.Jump_AD);
}
CS1238Var.Status = CS1238_STATUS_CH_SEL;
}
break;}
case CS1238_STATUS_CH_SEL:{
CS1238Var.Status = CS1238_STATUS_STOP;
BuildDelay = false;
uint8_t read_reg;
if(CS1238Port == CH_SEL_A){
#if(PORT_TEMP == 1)
read_reg = Read_CS1238_Config();
Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_TEMP);
CS1238Port = CH_SEL_TEMP;
BuildDelay = true;
break;
#endif
#if(PORT_JUMP == 1)
read_reg = Read_CS1238_Config();
Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_JUMP);
CS1238Port = CH_SEL_JUMP;
BuildDelay = true;
break;
#endif
}
if(CS1238Port == CH_SEL_B){
#if(PORT_TEMP == 1)
read_reg = Read_CS1238_Config();
Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_TEMP);
CS1238Port = CH_SEL_TEMP;
BuildDelay = true;
break;
#endif
#if(PORT_JUMP == 1)
read_reg = Read_CS1238_Config();
Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_JUMP);
CS1238Port = CH_SEL_JUMP;
BuildDelay = true;
break;
#endif
#if(PORT_A == 1)
read_reg = Read_CS1238_Config();
Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_A);
CS1238Port = CH_SEL_A;
BuildDelay = true;
break;
#endif
}
if(CS1238Port == CH_SEL_TEMP){
#if(PORT_JUMP == 1)
read_reg = Read_CS1238_Config();
Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_JUMP);
CS1238Port = CH_SEL_JUMP;
BuildDelay = true;
break;
#endif
#if(PORT_A == 1)
read_reg = Read_CS1238_Config();
Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_A);
CS1238Port = CH_SEL_A;
BuildDelay = true;
break;
#endif
}
if(CS1238Port == CH_SEL_JUMP){
#if(PORT_A == 1)
read_reg = Read_CS1238_Config();
Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_A);
CS1238Port = CH_SEL_A;
BuildDelay = true;
break;
#endif
#if(PORT_TEMP == 1)
read_reg = Read_CS1238_Config();
Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_TEMP);
CS1238Port = CH_SEL_TEMP;
BuildDelay = true;
break;
#endif
}
break;}
case CS1238_STATUS_STOP:{
//CS1238Stop();
//CS1238Var.Status = CS1238_STATUS_IDLE;
CS1238Var.Status = CS1238_STATUS_START;//持续工作
break;}
}
}
void CS12381mSRoutine(void)
{
if(CS1238Var.CS1238Delay1mSCnt > 0)
CS1238Var.CS1238Delay1mSCnt--;
}
void CS1238Start(void)
{
CS1238_WakeUp();
CS1238_1MS(2);
BuildDelay = true;
CS1238IntEnable();
if(!InitFlag){
CS1238_Init();
return;
}
CS1238Var.Status = CS1238_STATUS_START;
}
void CS1238Stop(void)
{
CS1238IntDisable();
CS1238_Sleep();
}
Project/HC32F460/source/Module/CS1237/CS1237_RIGHTUP.h
+91
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#include "bsp.h"
#ifndef _CS1238_H_
#define _CS1238_H_
#define READ_CONFIG_CMD 0x56
#define WRITE_CONFIG_CMD 0x65
#define CONFIG_RST 0x0C
#define REFO_OFF 0x40
#define REFO_ON 0x00
#define SPEED_SEL_10Hz 0x00
#define SPEED_SEL_40Hz 0x10
#define SPEED_SEL_640Hz 0x20
#define SPEED_SEL6_1280Hz 0x30
#define PGA_SEL_1 0x00
#define PGA_SEL_2 0x04
#define PGA_SEL_64 0x08
#define PGA_SEL_128 0x0C
#define CH_SEL_A 0x00
#define CH_SEL_B 0x01
#define CH_SEL_TEMP 0x02
#define CH_SEL_JUMP 0x03
#define CS1238_DOUT_OUT() SetBit(((uint32_t)&M0P_GPIO->PADIR + CS1238_DOUT_PORTx), CS1238_DOUT_PINx, 0)
#define CS1238_DOUT_IN() SetBit(((uint32_t)&M0P_GPIO->PADIR + CS1238_DOUT_PORTx), CS1238_DOUT_PINx, 1)
#define CS1238_DOUT_H() SET_CS1238_DOUT()
#define CS1238_DOUT_L() CLR_CS1238_DOUT()
#define CS1238_SCLK_H() SET_CS1238_SCLK()
#define CS1238_SCLK_L() CLR_CS1238_SCLK()
#define CS1238_1US(x) delay_us(x) //1us延时
#define CS1238_100NS(x) delay_ns(x) //100ns延时
#define CS1238_1MS(x) delay_ms(x) //1ms延时
/*Definition of conversion time corresponding to repeatability setting*/
/*
10Hz //建立时间300ms
40Hz //建立时间75ms
640Hz //建立时间6.25ms
1280Hz //建立时间3.125ms
*/
#define tCon_10Hz 300 /* ms. */
#define tCon_40Hz 75 /* ms. */
#define tCon_640Hz 7 /* ms. */
#define tCon_1280Hz 4 /* ms. */
#define PORT_A 1 //采集通道A
#define PORT_B 1 //采集通道B
#define PORT_TEMP 0 //采集温度
#define PORT_JUMP 0 //内短采集
#define PACK_NUM 10 //一次采集的数据包数量
typedef enum{
CS1238_STATUS_IDLE,
CS1238_STATUS_START,
CS1238_STATUS_DELAY,
CS1238_STATUS_READ,
CS1238_STATUS_WAIT_READ,
CS1238_STATUS_CH_SEL,
CS1238_STATUS_STOP,
}CS1238Status_m;
typedef struct{
CS1238Status_m Status;
uint32_t CS1238Delay1mSCnt;
int32_t Ain1_AD;//AIN1ad数据
int32_t Ain2_AD;//AIN2ad数据
int32_t Temp_AD;//温度ad数据
int32_t Jump_AD;//内短ad数据
}
CS1238Var_t;
extern CS1238Var_t CS1238Var;
void CS1238_Init(void);
void CS1238_IrqCallBack(void);
void CS1238DataLoopCollect(void);
void CS1238LoopHandler(void);
void CS12381mSRoutine(void);
void CS1238Start(void);
void CS1238Stop(void);
#endif