diff --git a/Project/HC32F460/MDK/HC32F460.uvoptx b/Project/HC32F460/MDK/HC32F460.uvoptx
index 2896250..58f4fd7 100644
--- a/Project/HC32F460/MDK/HC32F460.uvoptx
+++ b/Project/HC32F460/MDK/HC32F460.uvoptx
@@ -103,7 +103,7 @@
1
0
0
- 1
+ 6
@@ -114,9 +114,14 @@
- BIN\UL2CM3.DLL
+ Segger\JL2CM3.dll
+
+ 0
+ JL2CM3
+ -U4294967295 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO7 -FD1FFF8000 -FC1000 -FN2 -FF0HC32F460_512K.FLM -FS00 -FL080000 -FP0($$Device:HC32F460JEUA$FlashARM\HC32F460_512K.FLM) -FF1HC32F460_otp.FLM -FS13000C00 -FL13FC -FP1($$Device:HC32F460JEUA$FlashARM\HC32F460_otp.FLM)
+
0
UL2CM3
@@ -350,8 +355,8 @@
- User
- 1
+ driver
+ 0
0
0
0
@@ -362,8 +367,8 @@
0
0
0
- ..\source\User\Src\bsp.c
- bsp.c
+ ..\..\..\driver\src\hc32f460_wdt.c
+ hc32f460_wdt.c
0
0
@@ -374,118 +379,14 @@
0
0
0
- ..\source\User\Src\main.c
- main.c
- 0
- 0
-
-
-
-
- driver
- 1
- 0
- 0
- 0
-
- 3
- 5
- 1
- 0
- 0
- 0
..\..\..\driver\src\hc32f460_utility.c
hc32f460_utility.c
0
0
- 3
- 6
- 1
- 0
- 0
- 0
- ..\..\..\driver\src\hc32f460_pwc.c
- hc32f460_pwc.c
- 0
- 0
-
-
- 3
- 7
- 1
- 0
- 0
- 0
- ..\..\..\driver\src\hc32f460_interrupts.c
- hc32f460_interrupts.c
- 0
- 0
-
-
- 3
- 8
- 1
- 0
- 0
- 0
- ..\..\..\driver\src\hc32f460_clk.c
- hc32f460_clk.c
- 0
- 0
-
-
- 3
- 9
- 1
- 0
- 0
- 0
- ..\..\..\driver\src\hc32f460_icg.c
- hc32f460_icg.c
- 0
- 0
-
-
- 3
- 10
- 1
- 0
- 0
- 0
- ..\..\..\driver\src\hc32f460_efm.c
- hc32f460_efm.c
- 0
- 0
-
-
- 3
- 11
- 1
- 0
- 0
- 0
- ..\..\..\driver\src\hc32f460_sram.c
- hc32f460_sram.c
- 0
- 0
-
-
- 3
- 12
- 1
- 0
- 0
- 0
- ..\..\..\driver\src\hc32f460_gpio.c
- hc32f460_gpio.c
- 0
- 0
-
-
- 3
- 13
+ 2
+ 5
1
0
0
@@ -496,32 +397,140 @@
0
- 3
+ 2
+ 6
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\driver\src\hc32f460_trng.c
+ hc32f460_trng.c
+ 0
+ 0
+
+
+ 2
+ 7
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\driver\src\hc32f460_timera.c
+ hc32f460_timera.c
+ 0
+ 0
+
+
+ 2
+ 8
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\driver\src\hc32f460_timer6.c
+ hc32f460_timer6.c
+ 0
+ 0
+
+
+ 2
+ 9
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\driver\src\hc32f460_timer4_sevt.c
+ hc32f460_timer4_sevt.c
+ 0
+ 0
+
+
+ 2
+ 10
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\driver\src\hc32f460_timer4_pwm.c
+ hc32f460_timer4_pwm.c
+ 0
+ 0
+
+
+ 2
+ 11
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\driver\src\hc32f460_timer4_oco.c
+ hc32f460_timer4_oco.c
+ 0
+ 0
+
+
+ 2
+ 12
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\driver\src\hc32f460_timer4_emb.c
+ hc32f460_timer4_emb.c
+ 0
+ 0
+
+
+ 2
+ 13
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\driver\src\hc32f460_timer4_cnt.c
+ hc32f460_timer4_cnt.c
+ 0
+ 0
+
+
+ 2
14
1
0
0
0
+ ..\..\..\driver\src\hc32f460_timer0.c
+ hc32f460_timer0.c
+ 0
+ 0
+
+
+ 2
+ 15
+ 1
+ 0
+ 0
+ 0
..\..\..\driver\src\hc32f460_swdt.c
hc32f460_swdt.c
0
0
- 3
- 15
+ 2
+ 16
1
0
0
0
- ..\..\..\driver\src\hc32f460_ots.c
- hc32f460_ots.c
+ ..\..\..\driver\src\hc32f460_sram.c
+ hc32f460_sram.c
0
0
- 3
- 16
+ 2
+ 17
1
0
0
@@ -532,19 +541,7 @@
0
- 3
- 17
- 1
- 0
- 0
- 0
- ..\..\..\driver\src\hc32f460_exint_nmi_swi.c
- hc32f460_exint_nmi_swi.c
- 0
- 0
-
-
- 3
+ 2
18
1
0
@@ -556,36 +553,312 @@
0
- 3
+ 2
19
1
0
0
0
- ..\..\..\driver\src\hc32f460_dmac.c
- hc32f460_dmac.c
- 0
- 0
-
-
- 3
- 20
- 1
- 0
- 0
- 0
..\..\..\driver\src\hc32f460_rtc.c
hc32f460_rtc.c
0
0
- 3
+ 2
+ 20
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\driver\src\hc32f460_rmu.c
+ hc32f460_rmu.c
+ 0
+ 0
+
+
+ 2
21
1
0
0
0
+ ..\..\..\driver\src\hc32f460_qspi.c
+ hc32f460_qspi.c
+ 0
+ 0
+
+
+ 2
+ 22
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\driver\src\hc32f460_pwc.c
+ hc32f460_pwc.c
+ 0
+ 0
+
+
+ 2
+ 23
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\driver\src\hc32f460_ots.c
+ hc32f460_ots.c
+ 0
+ 0
+
+
+ 2
+ 24
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\driver\src\hc32f460_mpu.c
+ hc32f460_mpu.c
+ 0
+ 0
+
+
+ 2
+ 25
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\driver\src\hc32f460_keyscan.c
+ hc32f460_keyscan.c
+ 0
+ 0
+
+
+ 2
+ 26
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\driver\src\hc32f460_interrupts.c
+ hc32f460_interrupts.c
+ 0
+ 0
+
+
+ 2
+ 27
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\driver\src\hc32f460_icg.c
+ hc32f460_icg.c
+ 0
+ 0
+
+
+ 2
+ 28
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\driver\src\hc32f460_i2s.c
+ hc32f460_i2s.c
+ 0
+ 0
+
+
+ 2
+ 29
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\driver\src\hc32f460_i2c.c
+ hc32f460_i2c.c
+ 0
+ 0
+
+
+ 2
+ 30
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\driver\src\hc32f460_hash.c
+ hc32f460_hash.c
+ 0
+ 0
+
+
+ 2
+ 31
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\driver\src\hc32f460_gpio.c
+ hc32f460_gpio.c
+ 0
+ 0
+
+
+ 2
+ 32
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\driver\src\hc32f460_exint_nmi_swi.c
+ hc32f460_exint_nmi_swi.c
+ 0
+ 0
+
+
+ 2
+ 33
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\driver\src\hc32f460_event_port.c
+ hc32f460_event_port.c
+ 0
+ 0
+
+
+ 2
+ 34
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\driver\src\hc32f460_emb.c
+ hc32f460_emb.c
+ 0
+ 0
+
+
+ 2
+ 35
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\driver\src\hc32f460_efm.c
+ hc32f460_efm.c
+ 0
+ 0
+
+
+ 2
+ 36
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\driver\src\hc32f460_dmac.c
+ hc32f460_dmac.c
+ 0
+ 0
+
+
+ 2
+ 37
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\driver\src\hc32f460_dcu.c
+ hc32f460_dcu.c
+ 0
+ 0
+
+
+ 2
+ 38
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\driver\src\hc32f460_crc.c
+ hc32f460_crc.c
+ 0
+ 0
+
+
+ 2
+ 39
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\driver\src\hc32f460_cmp.c
+ hc32f460_cmp.c
+ 0
+ 0
+
+
+ 2
+ 40
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\driver\src\hc32f460_clk.c
+ hc32f460_clk.c
+ 0
+ 0
+
+
+ 2
+ 41
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\driver\src\hc32f460_can1.c
+ hc32f460_can1.c
+ 0
+ 0
+
+
+ 2
+ 42
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\driver\src\hc32f460_can.c
+ hc32f460_can.c
+ 0
+ 0
+
+
+ 2
+ 43
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\driver\src\hc32f460_aes.c
+ hc32f460_aes.c
+ 0
+ 0
+
+
+ 2
+ 44
+ 1
+ 0
+ 0
+ 0
..\..\..\driver\src\hc32f460_adc.c
hc32f460_adc.c
0
@@ -594,20 +867,88 @@
- Debug
- 0
+ User
+ 1
+ 0
+ 0
+ 0
+
+ 3
+ 45
+ 1
+ 0
+ 0
+ 0
+ ..\source\User\Src\bsp.c
+ bsp.c
+ 0
+ 0
+
+
+ 3
+ 46
+ 1
+ 0
+ 0
+ 0
+ ..\source\User\Src\main.c
+ main.c
+ 0
+ 0
+
+
+ 3
+ 47
+ 1
+ 0
+ 0
+ 0
+ ..\source\User\Src\Algorithm.c
+ Algorithm.c
+ 0
+ 0
+
+
+ 3
+ 48
+ 1
+ 0
+ 0
+ 0
+ ..\source\User\Src\Encryption.c
+ Encryption.c
+ 0
+ 0
+
+
+ 3
+ 49
+ 1
+ 0
+ 0
+ 0
+ ..\source\User\Src\Debug.c
+ Debug.c
+ 0
+ 0
+
+
+
+
+ CS1237
+ 1
0
0
0
4
- 22
+ 50
1
0
0
0
- ..\source\Module\Debug\Debug.c
- Debug.c
+ ..\source\Module\CS1237\CS1237_LEFTLOW.c
+ CS1237_LEFTLOW.c
0
0
diff --git a/Project/HC32F460/MDK/HC32F460.uvprojx b/Project/HC32F460/MDK/HC32F460.uvprojx
index b3d42a9..5f94494 100644
--- a/Project/HC32F460/MDK/HC32F460.uvprojx
+++ b/Project/HC32F460/MDK/HC32F460.uvprojx
@@ -10,8 +10,9 @@
Debug
0x4
ARM-ADS
- 5060750::V5.06 update 6 (build 750)::.\ARMCC
- 0
+ 6160000::V6.16::ARMCLANG
+ 6160000::V6.16::ARMCLANG
+ 1
HC32F460JEUA
@@ -314,7 +315,7 @@
1
- 1
+ 2
0
0
1
@@ -329,18 +330,18 @@
1
0
0
- 1
- 1
+ 3
+ 5
1
1
0
0
0
- --diag_suppress=186,66
+
__DEBUG,HC32F460,USE_DEVICE_DRIVER_LIB,JEUA
- ..\..\..\driver\inc;..\..\..\mcu\common;..\source\User\Inc;..\source\Module\Debug
+ ..\..\..\mcu\common;..\source\User\Inc;..\source\User\Src;..\..\..\driver\src;..\..\..\driver\inc;..\source\Module\CS1237
@@ -396,6 +397,221 @@
+
+ driver
+
+
+ hc32f460_wdt.c
+ 1
+ ..\..\..\driver\src\hc32f460_wdt.c
+
+
+ hc32f460_utility.c
+ 1
+ ..\..\..\driver\src\hc32f460_utility.c
+
+
+ hc32f460_usart.c
+ 1
+ ..\..\..\driver\src\hc32f460_usart.c
+
+
+ hc32f460_trng.c
+ 1
+ ..\..\..\driver\src\hc32f460_trng.c
+
+
+ hc32f460_timera.c
+ 1
+ ..\..\..\driver\src\hc32f460_timera.c
+
+
+ hc32f460_timer6.c
+ 1
+ ..\..\..\driver\src\hc32f460_timer6.c
+
+
+ hc32f460_timer4_sevt.c
+ 1
+ ..\..\..\driver\src\hc32f460_timer4_sevt.c
+
+
+ hc32f460_timer4_pwm.c
+ 1
+ ..\..\..\driver\src\hc32f460_timer4_pwm.c
+
+
+ hc32f460_timer4_oco.c
+ 1
+ ..\..\..\driver\src\hc32f460_timer4_oco.c
+
+
+ hc32f460_timer4_emb.c
+ 1
+ ..\..\..\driver\src\hc32f460_timer4_emb.c
+
+
+ hc32f460_timer4_cnt.c
+ 1
+ ..\..\..\driver\src\hc32f460_timer4_cnt.c
+
+
+ hc32f460_timer0.c
+ 1
+ ..\..\..\driver\src\hc32f460_timer0.c
+
+
+ hc32f460_swdt.c
+ 1
+ ..\..\..\driver\src\hc32f460_swdt.c
+
+
+ hc32f460_sram.c
+ 1
+ ..\..\..\driver\src\hc32f460_sram.c
+
+
+ hc32f460_spi.c
+ 1
+ ..\..\..\driver\src\hc32f460_spi.c
+
+
+ hc32f460_sdioc.c
+ 1
+ ..\..\..\driver\src\hc32f460_sdioc.c
+
+
+ hc32f460_rtc.c
+ 1
+ ..\..\..\driver\src\hc32f460_rtc.c
+
+
+ hc32f460_rmu.c
+ 1
+ ..\..\..\driver\src\hc32f460_rmu.c
+
+
+ hc32f460_qspi.c
+ 1
+ ..\..\..\driver\src\hc32f460_qspi.c
+
+
+ hc32f460_pwc.c
+ 1
+ ..\..\..\driver\src\hc32f460_pwc.c
+
+
+ hc32f460_ots.c
+ 1
+ ..\..\..\driver\src\hc32f460_ots.c
+
+
+ hc32f460_mpu.c
+ 1
+ ..\..\..\driver\src\hc32f460_mpu.c
+
+
+ hc32f460_keyscan.c
+ 1
+ ..\..\..\driver\src\hc32f460_keyscan.c
+
+
+ hc32f460_interrupts.c
+ 1
+ ..\..\..\driver\src\hc32f460_interrupts.c
+
+
+ hc32f460_icg.c
+ 1
+ ..\..\..\driver\src\hc32f460_icg.c
+
+
+ hc32f460_i2s.c
+ 1
+ ..\..\..\driver\src\hc32f460_i2s.c
+
+
+ hc32f460_i2c.c
+ 1
+ ..\..\..\driver\src\hc32f460_i2c.c
+
+
+ hc32f460_hash.c
+ 1
+ ..\..\..\driver\src\hc32f460_hash.c
+
+
+ hc32f460_gpio.c
+ 1
+ ..\..\..\driver\src\hc32f460_gpio.c
+
+
+ hc32f460_exint_nmi_swi.c
+ 1
+ ..\..\..\driver\src\hc32f460_exint_nmi_swi.c
+
+
+ hc32f460_event_port.c
+ 1
+ ..\..\..\driver\src\hc32f460_event_port.c
+
+
+ hc32f460_emb.c
+ 1
+ ..\..\..\driver\src\hc32f460_emb.c
+
+
+ hc32f460_efm.c
+ 1
+ ..\..\..\driver\src\hc32f460_efm.c
+
+
+ hc32f460_dmac.c
+ 1
+ ..\..\..\driver\src\hc32f460_dmac.c
+
+
+ hc32f460_dcu.c
+ 1
+ ..\..\..\driver\src\hc32f460_dcu.c
+
+
+ hc32f460_crc.c
+ 1
+ ..\..\..\driver\src\hc32f460_crc.c
+
+
+ hc32f460_cmp.c
+ 1
+ ..\..\..\driver\src\hc32f460_cmp.c
+
+
+ hc32f460_clk.c
+ 1
+ ..\..\..\driver\src\hc32f460_clk.c
+
+
+ hc32f460_can1.c
+ 1
+ ..\..\..\driver\src\hc32f460_can1.c
+
+
+ hc32f460_can.c
+ 1
+ ..\..\..\driver\src\hc32f460_can.c
+
+
+ hc32f460_aes.c
+ 1
+ ..\..\..\driver\src\hc32f460_aes.c
+
+
+ hc32f460_adc.c
+ 1
+ ..\..\..\driver\src\hc32f460_adc.c
+
+
+
User
@@ -409,105 +625,30 @@
1
..\source\User\Src\main.c
-
-
-
- driver
-
- hc32f460_utility.c
+ Algorithm.c
1
- ..\..\..\driver\src\hc32f460_utility.c
+ ..\source\User\Src\Algorithm.c
- hc32f460_pwc.c
+ Encryption.c
1
- ..\..\..\driver\src\hc32f460_pwc.c
+ ..\source\User\Src\Encryption.c
-
- hc32f460_interrupts.c
- 1
- ..\..\..\driver\src\hc32f460_interrupts.c
-
-
- hc32f460_clk.c
- 1
- ..\..\..\driver\src\hc32f460_clk.c
-
-
- hc32f460_icg.c
- 1
- ..\..\..\driver\src\hc32f460_icg.c
-
-
- hc32f460_efm.c
- 1
- ..\..\..\driver\src\hc32f460_efm.c
-
-
- hc32f460_sram.c
- 1
- ..\..\..\driver\src\hc32f460_sram.c
-
-
- hc32f460_gpio.c
- 1
- ..\..\..\driver\src\hc32f460_gpio.c
-
-
- hc32f460_usart.c
- 1
- ..\..\..\driver\src\hc32f460_usart.c
-
-
- hc32f460_swdt.c
- 1
- ..\..\..\driver\src\hc32f460_swdt.c
-
-
- hc32f460_ots.c
- 1
- ..\..\..\driver\src\hc32f460_ots.c
-
-
- hc32f460_spi.c
- 1
- ..\..\..\driver\src\hc32f460_spi.c
-
-
- hc32f460_exint_nmi_swi.c
- 1
- ..\..\..\driver\src\hc32f460_exint_nmi_swi.c
-
-
- hc32f460_sdioc.c
- 1
- ..\..\..\driver\src\hc32f460_sdioc.c
-
-
- hc32f460_dmac.c
- 1
- ..\..\..\driver\src\hc32f460_dmac.c
-
-
- hc32f460_rtc.c
- 1
- ..\..\..\driver\src\hc32f460_rtc.c
-
-
- hc32f460_adc.c
- 1
- ..\..\..\driver\src\hc32f460_adc.c
-
-
-
-
- Debug
-
Debug.c
1
- ..\source\Module\Debug\Debug.c
+ ..\source\User\Src\Debug.c
+
+
+
+
+ CS1237
+
+
+ CS1237_LEFTLOW.c
+ 1
+ ..\source\Module\CS1237\CS1237_LEFTLOW.c
@@ -909,6 +1050,221 @@
+
+ driver
+
+
+ hc32f460_wdt.c
+ 1
+ ..\..\..\driver\src\hc32f460_wdt.c
+
+
+ hc32f460_utility.c
+ 1
+ ..\..\..\driver\src\hc32f460_utility.c
+
+
+ hc32f460_usart.c
+ 1
+ ..\..\..\driver\src\hc32f460_usart.c
+
+
+ hc32f460_trng.c
+ 1
+ ..\..\..\driver\src\hc32f460_trng.c
+
+
+ hc32f460_timera.c
+ 1
+ ..\..\..\driver\src\hc32f460_timera.c
+
+
+ hc32f460_timer6.c
+ 1
+ ..\..\..\driver\src\hc32f460_timer6.c
+
+
+ hc32f460_timer4_sevt.c
+ 1
+ ..\..\..\driver\src\hc32f460_timer4_sevt.c
+
+
+ hc32f460_timer4_pwm.c
+ 1
+ ..\..\..\driver\src\hc32f460_timer4_pwm.c
+
+
+ hc32f460_timer4_oco.c
+ 1
+ ..\..\..\driver\src\hc32f460_timer4_oco.c
+
+
+ hc32f460_timer4_emb.c
+ 1
+ ..\..\..\driver\src\hc32f460_timer4_emb.c
+
+
+ hc32f460_timer4_cnt.c
+ 1
+ ..\..\..\driver\src\hc32f460_timer4_cnt.c
+
+
+ hc32f460_timer0.c
+ 1
+ ..\..\..\driver\src\hc32f460_timer0.c
+
+
+ hc32f460_swdt.c
+ 1
+ ..\..\..\driver\src\hc32f460_swdt.c
+
+
+ hc32f460_sram.c
+ 1
+ ..\..\..\driver\src\hc32f460_sram.c
+
+
+ hc32f460_spi.c
+ 1
+ ..\..\..\driver\src\hc32f460_spi.c
+
+
+ hc32f460_sdioc.c
+ 1
+ ..\..\..\driver\src\hc32f460_sdioc.c
+
+
+ hc32f460_rtc.c
+ 1
+ ..\..\..\driver\src\hc32f460_rtc.c
+
+
+ hc32f460_rmu.c
+ 1
+ ..\..\..\driver\src\hc32f460_rmu.c
+
+
+ hc32f460_qspi.c
+ 1
+ ..\..\..\driver\src\hc32f460_qspi.c
+
+
+ hc32f460_pwc.c
+ 1
+ ..\..\..\driver\src\hc32f460_pwc.c
+
+
+ hc32f460_ots.c
+ 1
+ ..\..\..\driver\src\hc32f460_ots.c
+
+
+ hc32f460_mpu.c
+ 1
+ ..\..\..\driver\src\hc32f460_mpu.c
+
+
+ hc32f460_keyscan.c
+ 1
+ ..\..\..\driver\src\hc32f460_keyscan.c
+
+
+ hc32f460_interrupts.c
+ 1
+ ..\..\..\driver\src\hc32f460_interrupts.c
+
+
+ hc32f460_icg.c
+ 1
+ ..\..\..\driver\src\hc32f460_icg.c
+
+
+ hc32f460_i2s.c
+ 1
+ ..\..\..\driver\src\hc32f460_i2s.c
+
+
+ hc32f460_i2c.c
+ 1
+ ..\..\..\driver\src\hc32f460_i2c.c
+
+
+ hc32f460_hash.c
+ 1
+ ..\..\..\driver\src\hc32f460_hash.c
+
+
+ hc32f460_gpio.c
+ 1
+ ..\..\..\driver\src\hc32f460_gpio.c
+
+
+ hc32f460_exint_nmi_swi.c
+ 1
+ ..\..\..\driver\src\hc32f460_exint_nmi_swi.c
+
+
+ hc32f460_event_port.c
+ 1
+ ..\..\..\driver\src\hc32f460_event_port.c
+
+
+ hc32f460_emb.c
+ 1
+ ..\..\..\driver\src\hc32f460_emb.c
+
+
+ hc32f460_efm.c
+ 1
+ ..\..\..\driver\src\hc32f460_efm.c
+
+
+ hc32f460_dmac.c
+ 1
+ ..\..\..\driver\src\hc32f460_dmac.c
+
+
+ hc32f460_dcu.c
+ 1
+ ..\..\..\driver\src\hc32f460_dcu.c
+
+
+ hc32f460_crc.c
+ 1
+ ..\..\..\driver\src\hc32f460_crc.c
+
+
+ hc32f460_cmp.c
+ 1
+ ..\..\..\driver\src\hc32f460_cmp.c
+
+
+ hc32f460_clk.c
+ 1
+ ..\..\..\driver\src\hc32f460_clk.c
+
+
+ hc32f460_can1.c
+ 1
+ ..\..\..\driver\src\hc32f460_can1.c
+
+
+ hc32f460_can.c
+ 1
+ ..\..\..\driver\src\hc32f460_can.c
+
+
+ hc32f460_aes.c
+ 1
+ ..\..\..\driver\src\hc32f460_aes.c
+
+
+ hc32f460_adc.c
+ 1
+ ..\..\..\driver\src\hc32f460_adc.c
+
+
+
User
@@ -922,105 +1278,30 @@
1
..\source\User\Src\main.c
-
-
-
- driver
-
- hc32f460_utility.c
+ Algorithm.c
1
- ..\..\..\driver\src\hc32f460_utility.c
+ ..\source\User\Src\Algorithm.c
- hc32f460_pwc.c
+ Encryption.c
1
- ..\..\..\driver\src\hc32f460_pwc.c
+ ..\source\User\Src\Encryption.c
-
- hc32f460_interrupts.c
- 1
- ..\..\..\driver\src\hc32f460_interrupts.c
-
-
- hc32f460_clk.c
- 1
- ..\..\..\driver\src\hc32f460_clk.c
-
-
- hc32f460_icg.c
- 1
- ..\..\..\driver\src\hc32f460_icg.c
-
-
- hc32f460_efm.c
- 1
- ..\..\..\driver\src\hc32f460_efm.c
-
-
- hc32f460_sram.c
- 1
- ..\..\..\driver\src\hc32f460_sram.c
-
-
- hc32f460_gpio.c
- 1
- ..\..\..\driver\src\hc32f460_gpio.c
-
-
- hc32f460_usart.c
- 1
- ..\..\..\driver\src\hc32f460_usart.c
-
-
- hc32f460_swdt.c
- 1
- ..\..\..\driver\src\hc32f460_swdt.c
-
-
- hc32f460_ots.c
- 1
- ..\..\..\driver\src\hc32f460_ots.c
-
-
- hc32f460_spi.c
- 1
- ..\..\..\driver\src\hc32f460_spi.c
-
-
- hc32f460_exint_nmi_swi.c
- 1
- ..\..\..\driver\src\hc32f460_exint_nmi_swi.c
-
-
- hc32f460_sdioc.c
- 1
- ..\..\..\driver\src\hc32f460_sdioc.c
-
-
- hc32f460_dmac.c
- 1
- ..\..\..\driver\src\hc32f460_dmac.c
-
-
- hc32f460_rtc.c
- 1
- ..\..\..\driver\src\hc32f460_rtc.c
-
-
- hc32f460_adc.c
- 1
- ..\..\..\driver\src\hc32f460_adc.c
-
-
-
-
- Debug
-
Debug.c
1
- ..\source\Module\Debug\Debug.c
+ ..\source\User\Src\Debug.c
+
+
+
+
+ CS1237
+
+
+ CS1237_LEFTLOW.c
+ 1
+ ..\source\Module\CS1237\CS1237_LEFTLOW.c
@@ -1037,8 +1318,8 @@
-
-
+
+
@@ -1051,7 +1332,7 @@
- <Project Info>
+ HC32F460
0
1
diff --git a/Project/HC32F460/source/Module/CS1237/CS1237_LEFTLOW.c b/Project/HC32F460/source/Module/CS1237/CS1237_LEFTLOW.c
new file mode 100644
index 0000000..f4bae4b
--- /dev/null
+++ b/Project/HC32F460/source/Module/CS1237/CS1237_LEFTLOW.c
@@ -0,0 +1,448 @@
+#include "CS1237_LEFTLOW.h"
+#include "Debug.h"
+#include "bsp.h"
+#include "main.h"
+#include "Algorithm.h"
+
+LEFTLOW_CS1237Var_t LEFTLOW_CS1237Var;
+static bool InitFlag;
+static bool CS1237IrqFlag;
+static bool BuildDelay;
+static uint8_t CS1237Port;
+static uint8_t CS1237Hz;
+static uint8_t CS1237PGA;
+extern void LEFTLOW_CS1237AinADataProcessCallBack(int32_t AD);
+
+
+/** cs1237 时序时钟*/
+static void CS1237_Clock(void)
+{
+ CS1237_SCLK_H();
+ CS1237_100NS(3);
+ CS1237_SCLK_L();
+ CS1237_100NS(3);
+}
+/** cs1237 休眠*/
+static void CS1237_Sleep(void)
+{
+ CS1237_SCLK_H();
+ CS1237_1US(150);
+}
+/** cs1237 唤醒*/
+static void CS1237_WakeUp(void)
+{
+ CS1237_SCLK_L();
+ CS1237_1US(20);
+}
+/**设置CS1237寄存器*/
+static void Set_CS1237_Config(uint8_t ad_reg)
+{
+ uint16_t bit_cout = 0;
+ uint8_t reg_temp = 0x00;
+ //DOUT由高变低之后开始读取数据
+ CS1237_DOUT_OUT();
+ CS1237_DOUT_H();
+ CS1237_DOUT_IN();
+ CS1237_SCLK_L(); //时钟拉低
+ LEFTLOW_CS1237Var.CS1237Delay1mSCnt = 300;
+ CS1237IrqFlag = false;
+ while(CS1237IrqFlag == false) //等待芯片准备好
+ {
+ if(CS1237Var.CS1237Delay1mSCnt <= 0){
+ DBG_LOG("LEFTLOW CS1237 Preparation Timeout...\r\n");
+ return; // 超时退出
+ }
+ }
+ CS1237IntDisable();
+ CS1237IrqFlag = false;
+
+
+ /* clk1-clk26 写期间不需要操作*/
+ for (bit_cout = 0; bit_cout < 26; bit_cout++)
+ {
+ CS1237_Clock(); //给一周期时钟
+ }
+ /* clk27 DOUT输出拉高*/
+ CS1237_Clock(); //给一周期时钟
+ CS1237_DOUT_H();
+ /* clk28 - clk29 发送写寄存器命令字 */
+ CS1237_Clock(); //给一周期时钟
+ CS1237_Clock(); //给一周期时钟
+
+ /* clk30 - clk36 发送写寄存器命令字 */
+ CS1237_DOUT_OUT();
+ reg_temp = WRITE_CONFIG_CMD << 1; //命令长度为 7bits (写0x65)左移1位
+ for (bit_cout = 0; bit_cout < 7; bit_cout++)
+ {
+ if (reg_temp & 0x80) //MSB
+ {
+ CS1237_DOUT_H();
+ }
+ else
+ {
+ CS1237_DOUT_L();
+ }
+ reg_temp = reg_temp << 1;
+ CS1237_Clock();
+ }
+ /* clk37写寄存器模式还是输出 */
+ CS1237_Clock();
+ /* clk38 ~ clk45 写入寄存器值 */
+ reg_temp = ad_reg;//要配件的寄存器数值
+ for (bit_cout = 0; bit_cout < 8; bit_cout++)
+ {
+ if (reg_temp & 0x80) //MSB
+ {
+ CS1237_DOUT_H();
+ }
+ else
+ {
+ CS1238_DOUT_L();
+ }
+ reg_temp = reg_temp << 1;
+ CS1237_Clock();
+ }
+ /* 8: clk46 */
+ CS1237_Clock();
+ CS1237_DOUT_H();
+ CS1237_DOUT_IN();
+ CS1237IntEnable();
+ return ;
+}
+
+/**读CS1237寄存器*/
+static int32_t Read_CS1237_Config(void)
+{
+ uint16_t bit_cout = 0;
+ uint8_t reg_temp = 0x00;
+ //DOUT由高变低之后开始读取数据
+ CS1237_DOUT_OUT();
+ CS1237_DOUT_H();
+ CS1237_DOUT_IN();
+ CS1237_SCLK_L(); //时钟拉低
+ CS1237Var.CS1237Delay1mSCnt = 300;
+ CS1237IrqFlag = false;
+ while(CS1237IrqFlag == false) //等待芯片准备好
+ {
+ if(CS1237Var.CS1237Delay1mSCnt <= 0){
+ DBG_LOG("LEFTLOW CS1237 Preparation Timeout...\r\n");
+ return 0; // 超时退出
+ }
+ }
+ CS1237IntDisable();
+ CS1237IrqFlag = false;
+
+ /* clk1-clk26 写期间不需要操作*/
+ for (bit_cout = 0; bit_cout < 26; bit_cout++)
+ {
+ CS1237_Clock(); //给一周期时钟
+ }
+ /* clk27 DOUT输出拉高*/
+ CS1237_Clock(); //给一周期时钟
+ CS1237_DOUT_H();
+ /* clk28 - clk29 发送写寄存器命令字 */
+ CS1237_Clock(); //给一周期时钟
+ CS1237_Clock(); //给一周期时钟
+
+ /* clk30 - clk36 发送读寄存器命令字 */
+ CS1237_DOUT_OUT();
+ reg_temp = READ_CONFIG_CMD << 1; //命令长度为 7bits (写0x56)左移1位
+ for (bit_cout = 0; bit_cout < 7; bit_cout++)
+ {
+ if (reg_temp & 0x80) //MSB
+ {
+ CS1237_DOUT_H();
+ }
+ else
+ {
+ CS1237_DOUT_L();
+ }
+ reg_temp = reg_temp << 1;
+ CS1237_Clock();
+ }
+ /* clk37，读寄存器模式改输入 */
+ CS1237_Clock();
+ CS1237_DOUT_IN();
+ for (bit_cout = 0; bit_cout < 8; bit_cout++)
+ {
+ CS1237_SCLK_H();
+ reg_temp <<= 1; //左移1位准备接受数据 初始默认0
+ CS1237_100NS(3);//延时300ns
+ if(GET_CS1237_DOUT() == true) //有数值则累加
+ reg_temp |= 1;
+ CS1237_SCLK_L();
+ CS1237_100NS(3);
+ }
+ /* 8: clk46 */
+ CS1237_Clock();
+ CS1237_DOUT_IN();
+ CS1237_DOUT_H();
+ CS1237IntEnable();
+ return reg_temp ;
+}
+/**读取CS1237的AD数*/
+static int32_t Read_CS1237_Ad_Data(void)
+{
+ uint16_t bit_cout = 0;
+ int32_t data_temp = 0;
+
+ /* clk1 ~ clk24 ADC数据*/
+ data_temp = 0;
+ for (bit_cout = 0; bit_cout < 24; bit_cout++)
+ {
+ CS1237_SCLK_H();
+ data_temp <<= 1; //左移1位准备接受数据 初始默认0
+ CS1237_100NS(3);//延时300ns
+ if(GET_CS1237_DOUT() == true) //有数值则累加
+ data_temp |= 1;
+ CS1237_SCLK_L();
+ CS1237_100NS(3);
+ }
+
+ /* clk25 ~ clk27 */
+ for (bit_cout = 24; bit_cout < 27; bit_cout++)
+ {
+ CS1237_Clock(); //给一周期时钟
+ }
+ CS1237_DOUT_H();
+ CS1237_SCLK_L();
+
+ if(data_temp > 0x7FFFFF) //取24位
+ {
+ data_temp |= 0xFF000000;
+ }
+ return data_temp;
+}
+
+void LEFTLOW_CS1237_IrqCallBack(void)
+{
+ CS1237IrqFlag = true;
+}
+void LEFTLOW_CS1237_Init(void)
+{
+ CS1237IrqFlag = false;
+ BuildDelay = false;
+ CS1237IntEnable();
+ LEFTLOW_CS1237Var.AinA_AD = 0;
+ //CS1237Var.Ain2_AD = 0;
+ LEFTLOW_CS1237Var.Temp_AD = 0;
+ LEFTLOW_CS1237Var.Jump_AD = 0;
+
+ CS1237Port = CH_SEL_A;
+ CS1237Hz = SPEED_SEL_40Hz;
+ CS1237PGA = PGA_SEL_128;
+
+ uint8_t read_reg = 0x00;
+ uint8_t set_reg = REFO_ON | CS1237Hz | CS1237PGA | CS1237Port;
+ CS1237_1MS(20);
+ Set_CS1237_Config(set_reg);
+ CS1237_1MS(20);
+ read_reg = Read_CS1237_Config();
+ CS1237_1MS(20);
+ if(read_reg != set_reg){
+ DBG_LOG("LEFTLOW CS1237 Init ERR...\r\n");
+ DBG_LOG("set_reg = %02X\tread_reg = %02X\r\n",set_reg,read_reg);
+ InitFlag = false;
+ }
+ else {
+ DBG_LOG("LEFTLOW CS1237 Init OK...\r\n");
+ //DBG_LOG("set_reg = %02X\tread_reg = %02X\r\n",set_reg,read_reg);
+ CS1237Port = read_reg & 0x03;
+ InitFlag = true;
+ }
+}
+void LEFTLOW_CS1237DataLoopCollect(void)
+{
+ static int32_t ad_array[PACK_NUM];
+ static uint8_t adcnt;
+ static uint8_t TimeOutmagcnt;
+
+ switch(LEFTLOW_CS1237Var.Status) {
+ case CS1237_STATUS_IDLE:{
+ break;}
+
+ case CS1237_STATUS_START:{
+ memset(&ad_array, 0x00, sizeof(ad_array));
+ adcnt = 0;
+ TimeOutmagcnt = 0;
+ memset(&LEFTLOW_CS1237Var, NULL, sizeof(LEFTLOW_CS1237Var));
+ if(BuildDelay == true)
+ {
+ BuildDelay = false;
+ if(CS1237Hz == SPEED_SEL_10Hz){
+ LEFTLOW_CS1237Var.CS1237Delay1mSCnt = tCon_10Hz;
+ }
+ if(CS1237Hz == SPEED_SEL_40Hz){
+ LEFTLOW_CS1237Var.CS1237Delay1mSCnt = tCon_40Hz;
+ }
+ if(CS1237Hz == SPEED_SEL_640Hz){
+ LEFTLOW_CS1237Var.CS1237Delay1mSCnt = tCon_640Hz;
+ }
+ if(CS1237Hz == SPEED_SEL6_1280Hz){
+ LEFTLOW_CS1237Var.CS1237Delay1mSCnt = tCon_1280Hz;
+ }
+ LEFTLOW_CS1237Var.Status = CS1237_STATUS_DELAY;
+ }
+ else
+ {
+ LEFTLOW_CS1237Var.Status = CS1237_STATUS_READ;
+ }
+ break;}
+
+ case CS1237_STATUS_DELAY:{
+ if(LEFTLOW_CS1237Var.CS1237Delay1mSCnt <= 0){
+ LEFTLOW_CS1237Var.Status = CS1237_STATUS_READ;
+ }
+ break;}
+
+ case CS1237_STATUS_READ:{
+ CS1237IrqFlag = false;
+ LEFTLOW_CS1237Var.CS1237Delay1mSCnt = 100;
+ LEFTLOW_CS1237Var.Status = CS1237_STATUS_WAIT_READ;
+ break;}
+
+ case CS1237_STATUS_WAIT_READ:{
+ if(LEFTLOW_CS1237Var.CS1237Delay1mSCnt <= 0){
+ LEFTLOW_CS1237Var.Status = CS1237_STATUS_READ;
+ TimeOutmagcnt++;
+ }
+ if(CS1237IrqFlag == true){
+ CS1237IrqFlag = false;
+ ad_array[adcnt++] = Read_CS1237_Ad_Data();
+ LEFTLOW_CS1237Var.Status = CS1237_STATUS_READ;
+ }
+ if(TimeOutmagcnt >= PACK_NUM){
+ TimeOutmagcnt = 0;
+ if(adcnt > 0){
+ if(CS1237Port == CH_SEL_A){
+ LEFTLOW_CS1237Var.AinA_AD = IntFilter_32t(ad_array, adcnt, FILTER_NUM);
+ LEFTLOW_CS1237AinADataProcessCallBack(LEFTLOW_CS1237Var.AinA_AD);
+ }
+ if(CS1237Port == CH_SEL_TEMP){
+ LEFTLOW_CS1237Var.Temp_AD = IntFilter_32t(ad_array, adcnt, FILTER_NUM);
+ //CS1237TempDataProcessCallBack(LEFTLOW_CS1237Var.Temp_AD);
+ }
+ if(CS1237Port == CH_SEL_JUMP){
+ LEFTLOW_CS1237Var.Jump_AD = IntFilter_32t(ad_array, adcnt, FILTER_NUM);
+ //CS1237JumpDataProcessCallBack(LEFTLOW_CS1237Var.Jump_AD);
+ }
+ LEFTLOW_CS1237Var.Status = CS1237_STATUS_CH_SEL;
+ }
+ else{
+ if(CS1237Port == CH_SEL_A){
+ DBG_LOG("CS1238 CHA TimeOut...\r\n");
+ }
+ if(CS1237Port == CH_SEL_TEMP){
+ DBG_LOG("CS1238 Temp TimeOut...\r\n");
+ }
+ if(CS1237Port == CH_SEL_JUMP){
+ DBG_LOG("CS1238 Jump TimeOut...\r\n");
+ }
+ LEFTLOW_CS1237Var.Status = CS1237_STATUS_CH_SEL;
+ }
+ }
+ if(adcnt >= PACK_NUM){
+ if(CS1237Port == CH_SEL_A){
+ LEFTLOW_CS1237Var.AinA_AD = IntFilter_32t(ad_array, adcnt, FILTER_NUM);
+ LEFTLOW_CS1237AinADataProcessCallBack(LEFTLOW_CS1237Var.AinA_AD);
+ }
+ if(CS1237Port == CH_SEL_TEMP){
+ LEFTLOW_CS1237Var.Temp_AD = IntFilter_32t(ad_array, adcnt, FILTER_NUM);
+ //CS1237TempDataProcessCallBack(LEFTLOW_CS1237Var.Temp_AD);
+ }
+ if(CS1237Port == CH_SEL_JUMP){
+ LEFTLOW_CS1237Var.Jump_AD = IntFilter_32t(ad_array, adcnt, FILTER_NUM);
+ //CS1237JumpDataProcessCallBack(LEFTLOW_CS1237Var.Jump_AD);
+ }
+ LEFTLOW_CS1237Var.Status = CS1237_STATUS_CH_SEL;
+ }
+ break;}
+
+ case CS1237_STATUS_CH_SEL:{
+ LEFTLOW_CS1237Var.Status = CS1237_STATUS_STOP;
+ BuildDelay = false;
+ uint8_t read_reg;
+ if(CS1237Port == CH_SEL_A){
+#if(PORT_TEMP == 1)
+ read_reg = Read_CS1237_Config();
+ Set_CS1237_Config((read_reg & 0xFC) | CH_SEL_TEMP);
+ CS1237Port = CH_SEL_TEMP;
+ BuildDelay = true;
+ break;
+#endif
+#if(PORT_JUMP == 1)
+ read_reg = Read_CS1237_Config();
+ Set_CS1237_Config((read_reg & 0xFC) | CH_SEL_JUMP);
+ CS1237Port = CH_SEL_JUMP;
+ BuildDelay = true;
+ break;
+#endif
+ }
+
+ if(CS1237Port == CH_SEL_TEMP){
+#if(PORT_JUMP == 1)
+ read_reg = Read_CS1238_Config();
+ Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_JUMP);
+ CS1238Port = CH_SEL_JUMP;
+ BuildDelay = true;
+ break;
+#endif
+#if(PORT_A == 1)
+ read_reg = Read_CS1237_Config();
+ Set_CS1237_Config((read_reg & 0xFC) | CH_SEL_A);
+ CS1237Port = CH_SEL_A;
+ BuildDelay = true;
+ break;
+#endif
+ }
+
+ if(CS1237Port == CH_SEL_JUMP){
+#if(PORT_A == 1)
+ read_reg = Read_CS1237_Config();
+ Set_CS1237_Config((read_reg & 0xFC) | CH_SEL_A);
+ CS1237Port = CH_SEL_A;
+ BuildDelay = true;
+ break;
+#endif
+#if(PORT_TEMP == 1)
+ read_reg = Read_CS1237_Config();
+ Set_CS1237_Config((read_reg & 0xFC) | CH_SEL_TEMP);
+ CS1237Port = CH_SEL_TEMP;
+ BuildDelay = true;
+ break;
+#endif
+ }
+ break;}
+
+ case CS1237_STATUS_STOP:{
+ //CS1237Stop();
+ //LEFTLOW_CS1237Var.Status = CS1237_STATUS_IDLE;
+ LEFTLOW_CS1237Var.Status = CS1237_STATUS_START;//持续工作
+ break;}
+ }
+}
+void LEFTLOW_CS12371mSRoutine(void)
+{
+ if(LEFTLOW_CS1237Var.CS1237Delay1mSCnt > 0)
+ LEFTLOW_CS1237Var.CS1237Delay1mSCnt--;
+}
+void LEFTLOW_CS1238Start(void)
+{
+ CS1237_WakeUp();
+ CS1237_1MS(2);
+ BuildDelay = true;
+ LEFTLOW_CS1237IntEnable();
+ if(!InitFlag){
+ LEFTLOW_CS1237_Init();
+ return;
+ }
+ LEFTLOW_CS1237Var.Status = CS1237_STATUS_START;
+}
+void LEFTLOW_CS1237Stop(void)
+{
+ LEFTLOW_CS1237IntDisable();
+ CS1237_Sleep();
+}
+
+
+
diff --git a/Project/HC32F460/source/Module/CS1237/CS1237_LEFTLOW.h b/Project/HC32F460/source/Module/CS1237/CS1237_LEFTLOW.h
new file mode 100644
index 0000000..a7f5a67
--- /dev/null
+++ b/Project/HC32F460/source/Module/CS1237/CS1237_LEFTLOW.h
@@ -0,0 +1,92 @@
+#include "bsp.h"
+
+#ifndef _CS1237_LEFTLOW_H_
+#define _CS1237_LEFTLOW_H_
+
+#define READ_CONFIG_CMD 0x56
+#define WRITE_CONFIG_CMD 0x65
+
+#define CONFIG_RST 0x0C
+
+#define REFO_OFF 0x40
+#define REFO_ON 0x00
+
+#define SPEED_SEL_10Hz 0x00
+#define SPEED_SEL_40Hz 0x10
+#define SPEED_SEL_640Hz 0x20
+#define SPEED_SEL6_1280Hz 0x30
+
+#define PGA_SEL_1 0x00
+#define PGA_SEL_2 0x04
+#define PGA_SEL_64 0x08
+#define PGA_SEL_128 0x0C
+
+#define CH_SEL_A 0x00
+//#define CH_SEL_B 0x01
+#define CH_SEL_TEMP 0x02
+#define CH_SEL_JUMP 0x03
+
+#define CS1237_DOUT_OUT() SetBit(((uint32_t)&M0P_GPIO->PADIR + LEFTLOW_CS1237_DOUT_PORTx), LEFTLOW_CS1237_DOUT_PINx, 0)
+#define CS1237_DOUT_IN() SetBit(((uint32_t)&M0P_GPIO->PADIR + LEFTLOW_CS1237_DOUT_PORTx), LEFTLOW_CS1237_DOUT_PINx, 1)
+#define CS1237_DOUT_H() SET_LEFTLOW_CS1237_DOUT()
+#define CS1237_DOUT_L() CLR_LEFTLOW_CS1237_DOUT()
+
+#define CS1237_SCLK_H() SET_LEFTLOW_CS1237_SCLK()
+#define CS1237_SCLK_L() CLR_LEFTLOW_CS1237_SCLK()
+
+#define CS1237_1US(x) delay_us(x) //1usʱ
+#define CS1237_100NS(x) delay_ns(x) //100nsʱ
+#define CS1237_1MS(x) delay_ms(x) //1msʱ
+
+/*Definition of conversion time corresponding to repeatability setting*/
+/*
+ 10Hz //ʱ300ms
+ 40Hz //ʱ75ms
+ 640Hz //ʱ6.25ms
+ 1280Hz //ʱ3.125ms
+*/
+#define tCon_10Hz 300 /* ms. */
+#define tCon_40Hz 75 /* ms. */
+#define tCon_640Hz 7 /* ms. */
+#define tCon_1280Hz 4 /* ms. */
+
+#define PORT_A 1 //ɼͨA
+//#define PORT_B 1 //ɼͨB
+#define PORT_TEMP 0 //ɼ¶
+#define PORT_JUMP 0 //ڶ̲ɼ
+#define PACK_NUM 10 //һβɼݰ
+#define FILTER_NUM 4 //˲
+
+typedef enum{
+ CS1237_STATUS_IDLE,
+ CS1237_STATUS_START,
+ CS1237_STATUS_DELAY,
+ CS1237_STATUS_READ,
+ CS1237_STATUS_WAIT_READ,
+ CS1237_STATUS_CH_SEL,
+ CS1237_STATUS_STOP,
+}CS1237Status_m;
+
+typedef struct{
+ CS1237Status_m Status;
+ uint32_t CS1237Delay1mSCnt;
+
+ int32_t AinA_AD;//AINAad
+ //int32_t Ain2_AD;//AIN2ad
+ int32_t Temp_AD;//¶ad
+ int32_t Jump_AD;//ڶad
+}
+LEFTLOW_CS1237Var_t;
+extern LEFTLOW_CS1237Var_t LEFTLOW_CS1237Var;
+
+void LEFTLOW_CS1237_Init(void);
+void LEFTLOW_CS1237_IrqCallBack(void);
+void LEFTLOW_CS1237DataLoopCollect(void);
+void LEFTLOW_CS1237LoopHandler(void);
+void LEFTLOW_CS12371mSRoutine(void);
+void LEFTLOW_CS1237Start(void);
+void LEFTLOW_CS1237Stop(void);
+#endif
+
+
+
diff --git a/Project/HC32F460/source/Module/CS1237/CS1237_LEFTUP.c b/Project/HC32F460/source/Module/CS1237/CS1237_LEFTUP.c
new file mode 100644
index 0000000..a10e7c8
--- /dev/null
+++ b/Project/HC32F460/source/Module/CS1237/CS1237_LEFTUP.c
@@ -0,0 +1,485 @@
+#include "CS1238.h"
+#include "UartDebug.h"
+#include "bsp.h"
+#include "main.h"
+#include "Algorithm.h"
+
+CS1238Var_t CS1238Var;
+static bool InitFlag;
+static bool CS1238IrqFlag;
+static bool BuildDelay;
+static uint8_t CS1238Port;
+static uint8_t CS1238Hz;
+static uint8_t CS1238PGA;
+extern void CS1238Ain1DataProcessCallBack(int32_t AD);
+extern void CS1238Ain2DataProcessCallBack(int32_t AD);
+extern void CS1238TempDataProcessCallBack(int32_t AD);
+extern void CS1238JumpDataProcessCallBack(int32_t AD);
+
+/** cs1238 时序时钟*/
+static void CS1238_Clock(void)
+{
+ CS1238_SCLK_H();
+ CS1238_100NS(3);
+ CS1238_SCLK_L();
+ CS1238_100NS(3);
+}
+/** cs1238 休眠*/
+static void CS1238_Sleep(void)
+{
+ CS1238_SCLK_H();
+ CS1238_1US(150);
+}
+/** cs1238 唤醒*/
+static void CS1238_WakeUp(void)
+{
+ CS1238_SCLK_L();
+ CS1238_1US(20);
+}
+/**设置CS1238寄存器*/
+static void Set_CS1238_Config(uint8_t ad_reg)
+{
+ uint16_t bit_cout = 0;
+ uint8_t reg_temp = 0x00;
+ //DOUT由高变低之后开始读取数据
+ CS1238_DOUT_OUT();
+ CS1238_DOUT_H();
+ CS1238_DOUT_IN();
+ CS1238_SCLK_L(); //时钟拉低
+ CS1238Var.CS1238Delay1mSCnt = 300;
+ CS1238IrqFlag = false;
+ while(CS1238IrqFlag == false) //等待芯片准备好
+ {
+ if(CS1238Var.CS1238Delay1mSCnt <= 0){
+ DBG_LOG("CS1238 Preparation Timeout...\r\n");
+ return; // 超时退出
+ }
+ }
+ CS1238IntDisable();
+ CS1238IrqFlag = false;
+
+
+ /* clk1-clk26 写期间不需要操作*/
+ for (bit_cout = 0; bit_cout < 26; bit_cout++)
+ {
+ CS1238_Clock(); //给一周期时钟
+ }
+ /* clk27 DOUT输出拉高*/
+ CS1238_Clock(); //给一周期时钟
+ CS1238_DOUT_H();
+ /* clk28 - clk29 发送写寄存器命令字 */
+ CS1238_Clock(); //给一周期时钟
+ CS1238_Clock(); //给一周期时钟
+
+ /* clk30 - clk36 发送写寄存器命令字 */
+ CS1238_DOUT_OUT();
+ reg_temp = WRITE_CONFIG_CMD << 1; //命令长度为 7bits (写0x65)左移1位
+ for (bit_cout = 0; bit_cout < 7; bit_cout++)
+ {
+ if (reg_temp & 0x80) //MSB
+ {
+ CS1238_DOUT_H();
+ }
+ else
+ {
+ CS1238_DOUT_L();
+ }
+ reg_temp = reg_temp << 1;
+ CS1238_Clock();
+ }
+ /* clk37写寄存器模式还是输出 */
+ CS1238_Clock();
+ /* clk38 ~ clk45 写入寄存器值 */
+ reg_temp = ad_reg;//要配件的寄存器数值
+ for (bit_cout = 0; bit_cout < 8; bit_cout++)
+ {
+ if (reg_temp & 0x80) //MSB
+ {
+ CS1238_DOUT_H();
+ }
+ else
+ {
+ CS1238_DOUT_L();
+ }
+ reg_temp = reg_temp << 1;
+ CS1238_Clock();
+ }
+ /* 8: clk46 */
+ CS1238_Clock();
+ CS1238_DOUT_H();
+ CS1238_DOUT_IN();
+ CS1238IntEnable();
+ return ;
+}
+
+/**读CS1238寄存器*/
+static int32_t Read_CS1238_Config(void)
+{
+ uint16_t bit_cout = 0;
+ uint8_t reg_temp = 0x00;
+ //DOUT由高变低之后开始读取数据
+ CS1238_DOUT_OUT();
+ CS1238_DOUT_H();
+ CS1238_DOUT_IN();
+ CS1238_SCLK_L(); //时钟拉低
+ CS1238Var.CS1238Delay1mSCnt = 300;
+ CS1238IrqFlag = false;
+ while(CS1238IrqFlag == false) //等待芯片准备好
+ {
+ if(CS1238Var.CS1238Delay1mSCnt <= 0){
+ DBG_LOG("CS1238 Preparation Timeout...\r\n");
+ return 0; // 超时退出
+ }
+ }
+ CS1238IntDisable();
+ CS1238IrqFlag = false;
+
+ /* clk1-clk26 写期间不需要操作*/
+ for (bit_cout = 0; bit_cout < 26; bit_cout++)
+ {
+ CS1238_Clock(); //给一周期时钟
+ }
+ /* clk27 DOUT输出拉高*/
+ CS1238_Clock(); //给一周期时钟
+ CS1238_DOUT_H();
+ /* clk28 - clk29 发送写寄存器命令字 */
+ CS1238_Clock(); //给一周期时钟
+ CS1238_Clock(); //给一周期时钟
+
+ /* clk30 - clk36 发送读寄存器命令字 */
+ CS1238_DOUT_OUT();
+ reg_temp = READ_CONFIG_CMD << 1; //命令长度为 7bits (写0x56)左移1位
+ for (bit_cout = 0; bit_cout < 7; bit_cout++)
+ {
+ if (reg_temp & 0x80) //MSB
+ {
+ CS1238_DOUT_H();
+ }
+ else
+ {
+ CS1238_DOUT_L();
+ }
+ reg_temp = reg_temp << 1;
+ CS1238_Clock();
+ }
+ /* clk37，读寄存器模式改输入 */
+ CS1238_Clock();
+ CS1238_DOUT_IN();
+ for (bit_cout = 0; bit_cout < 8; bit_cout++)
+ {
+ CS1238_SCLK_H();
+ reg_temp <<= 1; //左移1位准备接受数据 初始默认0
+ CS1238_100NS(3);//延时300ns
+ if(GET_CS1238_DOUT() == true) //有数值则累加
+ reg_temp |= 1;
+ CS1238_SCLK_L();
+ CS1238_100NS(3);
+ }
+ /* 8: clk46 */
+ CS1238_Clock();
+ CS1238_DOUT_IN();
+ CS1238_DOUT_H();
+ CS1238IntEnable();
+ return reg_temp ;
+}
+/**读取CS1238的AD数*/
+static int32_t Read_CS1238_Ad_Data(void)
+{
+ uint16_t bit_cout = 0;
+ int32_t data_temp = 0;
+
+ /* clk1 ~ clk24 ADC数据*/
+ data_temp = 0;
+ for (bit_cout = 0; bit_cout < 24; bit_cout++)
+ {
+ CS1238_SCLK_H();
+ data_temp <<= 1; //左移1位准备接受数据 初始默认0
+ CS1238_100NS(3);//延时300ns
+ if(GET_CS1238_DOUT() == true) //有数值则累加
+ data_temp |= 1;
+ CS1238_SCLK_L();
+ CS1238_100NS(3);
+ }
+
+ /* clk25 ~ clk27 */
+ for (bit_cout = 24; bit_cout < 27; bit_cout++)
+ {
+ CS1238_Clock(); //给一周期时钟
+ }
+ CS1238_DOUT_H();
+ CS1238_SCLK_L();
+
+ if(data_temp > 0x7FFFFF) //取24位
+ {
+ data_temp |= 0xFF000000;
+ }
+ return data_temp;
+}
+
+void CS1238_IrqCallBack(void)
+{
+ CS1238IrqFlag = true;
+}
+void CS1238_Init(void)
+{
+ CS1238IrqFlag = false;
+ BuildDelay = false;
+ CS1238IntEnable();
+ CS1238Var.Ain1_AD = 0;
+ CS1238Var.Ain2_AD = 0;
+ CS1238Var.Temp_AD = 0;
+ CS1238Var.Jump_AD = 0;
+
+ CS1238Port = CH_SEL_A;
+ CS1238Hz = SPEED_SEL_640Hz;
+ CS1238PGA = PGA_SEL_128;
+
+ uint8_t read_reg = 0x00;
+ uint8_t set_reg = REFO_ON | CS1238Hz | CS1238PGA | CS1238Port;
+ CS1238_1MS(20);
+ Set_CS1238_Config(set_reg);
+ CS1238_1MS(20);
+ read_reg = Read_CS1238_Config();
+ CS1238_1MS(20);
+ if(read_reg != set_reg){
+ DBG_LOG("CS1238 Init ERR...\r\n");
+ DBG_LOG("set_reg = %02X\tread_reg = %02X\r\n",set_reg,read_reg);
+ InitFlag = false;
+ }
+ else {
+ DBG_LOG("CS1238 Init OK...\r\n");
+ //DBG_LOG("set_reg = %02X\tread_reg = %02X\r\n",set_reg,read_reg);
+ CS1238Port = read_reg & 0x03;
+ InitFlag = true;
+ }
+}
+void CS1238DataLoopCollect(void)
+{
+ static int32_t ad_array[PACK_NUM];
+ static uint8_t adcnt;
+ static uint8_t TimeOutmagcnt;
+
+ switch(CS1238Var.Status) {
+ case CS1238_STATUS_IDLE:{
+ break;}
+
+ case CS1238_STATUS_START:{
+ memset(&ad_array, 0x00, sizeof(ad_array));
+ adcnt = 0;
+ TimeOutmagcnt = 0;
+ memset(&CS1238Var, NULL, sizeof(CS1238Var));
+ if(BuildDelay == true)
+ {
+ BuildDelay = false;
+ if(CS1238Hz == SPEED_SEL_10Hz){
+ CS1238Var.CS1238Delay1mSCnt = tCon_10Hz;
+ }
+ if(CS1238Hz == SPEED_SEL_40Hz){
+ CS1238Var.CS1238Delay1mSCnt = tCon_40Hz;
+ }
+ if(CS1238Hz == SPEED_SEL_640Hz){
+ CS1238Var.CS1238Delay1mSCnt = tCon_640Hz;
+ }
+ if(CS1238Hz == SPEED_SEL6_1280Hz){
+ CS1238Var.CS1238Delay1mSCnt = tCon_1280Hz;
+ }
+ CS1238Var.Status = CS1238_STATUS_DELAY;
+ }
+ else
+ {
+ CS1238Var.Status = CS1238_STATUS_READ;
+ }
+ break;}
+
+ case CS1238_STATUS_DELAY:{
+ if(CS1238Var.CS1238Delay1mSCnt <= 0){
+ CS1238Var.Status = CS1238_STATUS_READ;
+ }
+ break;}
+
+ case CS1238_STATUS_READ:{
+ CS1238IrqFlag = false;
+ CS1238Var.CS1238Delay1mSCnt = 100;
+ CS1238Var.Status = CS1238_STATUS_WAIT_READ;
+ break;}
+
+ case CS1238_STATUS_WAIT_READ:{
+ if(CS1238Var.CS1238Delay1mSCnt <= 0){
+ CS1238Var.Status = CS1238_STATUS_READ;
+ TimeOutmagcnt++;
+ }
+ if(CS1238IrqFlag == true){
+ CS1238IrqFlag = false;
+ ad_array[adcnt++] = Read_CS1238_Ad_Data();
+ CS1238Var.Status = CS1238_STATUS_READ;
+ }
+ if(TimeOutmagcnt >= PACK_NUM){
+ TimeOutmagcnt = 0;
+ if(adcnt > 0){
+ if(CS1238Port == CH_SEL_A){
+ CS1238Var.Ain1_AD = IntFilter_32t(ad_array, adcnt, 4);
+ CS1238Ain1DataProcessCallBack(CS1238Var.Ain1_AD);
+ }
+ if(CS1238Port == CH_SEL_B){
+ CS1238Var.Ain2_AD = IntFilter_32t(ad_array, adcnt, 4);
+ CS1238Ain2DataProcessCallBack(CS1238Var.Ain2_AD);
+ }
+ if(CS1238Port == CH_SEL_TEMP){
+ CS1238Var.Temp_AD = IntFilter_32t(ad_array, adcnt, 4);
+ CS1238TempDataProcessCallBack(CS1238Var.Temp_AD);
+ }
+ if(CS1238Port == CH_SEL_JUMP){
+ CS1238Var.Jump_AD = IntFilter_32t(ad_array, adcnt, 4);
+ CS1238JumpDataProcessCallBack(CS1238Var.Jump_AD);
+ }
+ CS1238Var.Status = CS1238_STATUS_CH_SEL;
+ }
+ else{
+ if(CS1238Port == CH_SEL_A){
+ DBG_LOG("CS1238 CHA TimeOut...\r\n");
+ }
+ if(CS1238Port == CH_SEL_B){
+ DBG_LOG("CS1238 CHB TimeOut...\r\n");
+ }
+ if(CS1238Port == CH_SEL_TEMP){
+ DBG_LOG("CS1238 Temp TimeOut...\r\n");
+ }
+ if(CS1238Port == CH_SEL_JUMP){
+ DBG_LOG("CS1238 Jump TimeOut...\r\n");
+ }
+ CS1238Var.Status = CS1238_STATUS_CH_SEL;
+ }
+ }
+ if(adcnt >= PACK_NUM){
+ if(CS1238Port == CH_SEL_A){
+ CS1238Var.Ain1_AD = IntFilter_32t(ad_array, adcnt, 4);
+ CS1238Ain1DataProcessCallBack(CS1238Var.Ain1_AD);
+ }
+ if(CS1238Port == CH_SEL_B){
+ CS1238Var.Ain2_AD = IntFilter_32t(ad_array, adcnt, 4);
+ CS1238Ain2DataProcessCallBack(CS1238Var.Ain2_AD);
+ }
+ if(CS1238Port == CH_SEL_TEMP){
+ CS1238Var.Temp_AD = IntFilter_32t(ad_array, adcnt, 4);
+ CS1238TempDataProcessCallBack(CS1238Var.Temp_AD);
+ }
+ if(CS1238Port == CH_SEL_JUMP){
+ CS1238Var.Jump_AD = IntFilter_32t(ad_array, adcnt, 4);
+ CS1238JumpDataProcessCallBack(CS1238Var.Jump_AD);
+ }
+ CS1238Var.Status = CS1238_STATUS_CH_SEL;
+ }
+ break;}
+
+ case CS1238_STATUS_CH_SEL:{
+ CS1238Var.Status = CS1238_STATUS_STOP;
+ BuildDelay = false;
+ uint8_t read_reg;
+ if(CS1238Port == CH_SEL_A){
+#if(PORT_TEMP == 1)
+ read_reg = Read_CS1238_Config();
+ Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_TEMP);
+ CS1238Port = CH_SEL_TEMP;
+ BuildDelay = true;
+ break;
+#endif
+#if(PORT_JUMP == 1)
+ read_reg = Read_CS1238_Config();
+ Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_JUMP);
+ CS1238Port = CH_SEL_JUMP;
+ BuildDelay = true;
+ break;
+#endif
+ }
+
+ if(CS1238Port == CH_SEL_B){
+#if(PORT_TEMP == 1)
+ read_reg = Read_CS1238_Config();
+ Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_TEMP);
+ CS1238Port = CH_SEL_TEMP;
+ BuildDelay = true;
+ break;
+#endif
+#if(PORT_JUMP == 1)
+ read_reg = Read_CS1238_Config();
+ Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_JUMP);
+ CS1238Port = CH_SEL_JUMP;
+ BuildDelay = true;
+ break;
+#endif
+#if(PORT_A == 1)
+ read_reg = Read_CS1238_Config();
+ Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_A);
+ CS1238Port = CH_SEL_A;
+ BuildDelay = true;
+ break;
+#endif
+ }
+
+ if(CS1238Port == CH_SEL_TEMP){
+#if(PORT_JUMP == 1)
+ read_reg = Read_CS1238_Config();
+ Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_JUMP);
+ CS1238Port = CH_SEL_JUMP;
+ BuildDelay = true;
+ break;
+#endif
+#if(PORT_A == 1)
+ read_reg = Read_CS1238_Config();
+ Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_A);
+ CS1238Port = CH_SEL_A;
+ BuildDelay = true;
+ break;
+#endif
+ }
+
+ if(CS1238Port == CH_SEL_JUMP){
+#if(PORT_A == 1)
+ read_reg = Read_CS1238_Config();
+ Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_A);
+ CS1238Port = CH_SEL_A;
+ BuildDelay = true;
+ break;
+#endif
+#if(PORT_TEMP == 1)
+ read_reg = Read_CS1238_Config();
+ Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_TEMP);
+ CS1238Port = CH_SEL_TEMP;
+ BuildDelay = true;
+ break;
+#endif
+ }
+ break;}
+
+ case CS1238_STATUS_STOP:{
+ //CS1238Stop();
+ //CS1238Var.Status = CS1238_STATUS_IDLE;
+ CS1238Var.Status = CS1238_STATUS_START;//持续工作
+ break;}
+ }
+}
+void CS12381mSRoutine(void)
+{
+ if(CS1238Var.CS1238Delay1mSCnt > 0)
+ CS1238Var.CS1238Delay1mSCnt--;
+}
+void CS1238Start(void)
+{
+ CS1238_WakeUp();
+ CS1238_1MS(2);
+ BuildDelay = true;
+ CS1238IntEnable();
+ if(!InitFlag){
+ CS1238_Init();
+ return;
+ }
+ CS1238Var.Status = CS1238_STATUS_START;
+}
+void CS1238Stop(void)
+{
+ CS1238IntDisable();
+ CS1238_Sleep();
+}
+
+
+
diff --git a/Project/HC32F460/source/Module/CS1237/CS1237_LEFTUP.h b/Project/HC32F460/source/Module/CS1237/CS1237_LEFTUP.h
new file mode 100644
index 0000000..354d39d
--- /dev/null
+++ b/Project/HC32F460/source/Module/CS1237/CS1237_LEFTUP.h
@@ -0,0 +1,91 @@
+#include "bsp.h"
+
+#ifndef _CS1238_H_
+#define _CS1238_H_
+
+#define READ_CONFIG_CMD 0x56
+#define WRITE_CONFIG_CMD 0x65
+
+#define CONFIG_RST 0x0C
+
+#define REFO_OFF 0x40
+#define REFO_ON 0x00
+
+#define SPEED_SEL_10Hz 0x00
+#define SPEED_SEL_40Hz 0x10
+#define SPEED_SEL_640Hz 0x20
+#define SPEED_SEL6_1280Hz 0x30
+
+#define PGA_SEL_1 0x00
+#define PGA_SEL_2 0x04
+#define PGA_SEL_64 0x08
+#define PGA_SEL_128 0x0C
+
+#define CH_SEL_A 0x00
+#define CH_SEL_B 0x01
+#define CH_SEL_TEMP 0x02
+#define CH_SEL_JUMP 0x03
+
+#define CS1238_DOUT_OUT() SetBit(((uint32_t)&M0P_GPIO->PADIR + CS1238_DOUT_PORTx), CS1238_DOUT_PINx, 0)
+#define CS1238_DOUT_IN() SetBit(((uint32_t)&M0P_GPIO->PADIR + CS1238_DOUT_PORTx), CS1238_DOUT_PINx, 1)
+#define CS1238_DOUT_H() SET_CS1238_DOUT()
+#define CS1238_DOUT_L() CLR_CS1238_DOUT()
+
+#define CS1238_SCLK_H() SET_CS1238_SCLK()
+#define CS1238_SCLK_L() CLR_CS1238_SCLK()
+
+#define CS1238_1US(x) delay_us(x) //1usʱ
+#define CS1238_100NS(x) delay_ns(x) //100nsʱ
+#define CS1238_1MS(x) delay_ms(x) //1msʱ
+
+/*Definition of conversion time corresponding to repeatability setting*/
+/*
+ 10Hz //ʱ300ms
+ 40Hz //ʱ75ms
+ 640Hz //ʱ6.25ms
+ 1280Hz //ʱ3.125ms
+*/
+#define tCon_10Hz 300 /* ms. */
+#define tCon_40Hz 75 /* ms. */
+#define tCon_640Hz 7 /* ms. */
+#define tCon_1280Hz 4 /* ms. */
+
+#define PORT_A 1 //ɼͨA
+#define PORT_B 1 //ɼͨB
+#define PORT_TEMP 0 //ɼ¶
+#define PORT_JUMP 0 //ڶ̲ɼ
+#define PACK_NUM 10 //һβɼݰ
+
+typedef enum{
+ CS1238_STATUS_IDLE,
+ CS1238_STATUS_START,
+ CS1238_STATUS_DELAY,
+ CS1238_STATUS_READ,
+ CS1238_STATUS_WAIT_READ,
+ CS1238_STATUS_CH_SEL,
+ CS1238_STATUS_STOP,
+}CS1238Status_m;
+
+typedef struct{
+ CS1238Status_m Status;
+ uint32_t CS1238Delay1mSCnt;
+
+ int32_t Ain1_AD;//AIN1ad
+ int32_t Ain2_AD;//AIN2ad
+ int32_t Temp_AD;//¶ad
+ int32_t Jump_AD;//ڶad
+}
+CS1238Var_t;
+extern CS1238Var_t CS1238Var;
+
+void CS1238_Init(void);
+void CS1238_IrqCallBack(void);
+void CS1238DataLoopCollect(void);
+void CS1238LoopHandler(void);
+void CS12381mSRoutine(void);
+void CS1238Start(void);
+void CS1238Stop(void);
+#endif
+
+
+
diff --git a/Project/HC32F460/source/Module/CS1237/CS1237_RIGHRLOW.c b/Project/HC32F460/source/Module/CS1237/CS1237_RIGHRLOW.c
new file mode 100644
index 0000000..a10e7c8
--- /dev/null
+++ b/Project/HC32F460/source/Module/CS1237/CS1237_RIGHRLOW.c
@@ -0,0 +1,485 @@
+#include "CS1238.h"
+#include "UartDebug.h"
+#include "bsp.h"
+#include "main.h"
+#include "Algorithm.h"
+
+CS1238Var_t CS1238Var;
+static bool InitFlag;
+static bool CS1238IrqFlag;
+static bool BuildDelay;
+static uint8_t CS1238Port;
+static uint8_t CS1238Hz;
+static uint8_t CS1238PGA;
+extern void CS1238Ain1DataProcessCallBack(int32_t AD);
+extern void CS1238Ain2DataProcessCallBack(int32_t AD);
+extern void CS1238TempDataProcessCallBack(int32_t AD);
+extern void CS1238JumpDataProcessCallBack(int32_t AD);
+
+/** cs1238 时序时钟*/
+static void CS1238_Clock(void)
+{
+ CS1238_SCLK_H();
+ CS1238_100NS(3);
+ CS1238_SCLK_L();
+ CS1238_100NS(3);
+}
+/** cs1238 休眠*/
+static void CS1238_Sleep(void)
+{
+ CS1238_SCLK_H();
+ CS1238_1US(150);
+}
+/** cs1238 唤醒*/
+static void CS1238_WakeUp(void)
+{
+ CS1238_SCLK_L();
+ CS1238_1US(20);
+}
+/**设置CS1238寄存器*/
+static void Set_CS1238_Config(uint8_t ad_reg)
+{
+ uint16_t bit_cout = 0;
+ uint8_t reg_temp = 0x00;
+ //DOUT由高变低之后开始读取数据
+ CS1238_DOUT_OUT();
+ CS1238_DOUT_H();
+ CS1238_DOUT_IN();
+ CS1238_SCLK_L(); //时钟拉低
+ CS1238Var.CS1238Delay1mSCnt = 300;
+ CS1238IrqFlag = false;
+ while(CS1238IrqFlag == false) //等待芯片准备好
+ {
+ if(CS1238Var.CS1238Delay1mSCnt <= 0){
+ DBG_LOG("CS1238 Preparation Timeout...\r\n");
+ return; // 超时退出
+ }
+ }
+ CS1238IntDisable();
+ CS1238IrqFlag = false;
+
+
+ /* clk1-clk26 写期间不需要操作*/
+ for (bit_cout = 0; bit_cout < 26; bit_cout++)
+ {
+ CS1238_Clock(); //给一周期时钟
+ }
+ /* clk27 DOUT输出拉高*/
+ CS1238_Clock(); //给一周期时钟
+ CS1238_DOUT_H();
+ /* clk28 - clk29 发送写寄存器命令字 */
+ CS1238_Clock(); //给一周期时钟
+ CS1238_Clock(); //给一周期时钟
+
+ /* clk30 - clk36 发送写寄存器命令字 */
+ CS1238_DOUT_OUT();
+ reg_temp = WRITE_CONFIG_CMD << 1; //命令长度为 7bits (写0x65)左移1位
+ for (bit_cout = 0; bit_cout < 7; bit_cout++)
+ {
+ if (reg_temp & 0x80) //MSB
+ {
+ CS1238_DOUT_H();
+ }
+ else
+ {
+ CS1238_DOUT_L();
+ }
+ reg_temp = reg_temp << 1;
+ CS1238_Clock();
+ }
+ /* clk37写寄存器模式还是输出 */
+ CS1238_Clock();
+ /* clk38 ~ clk45 写入寄存器值 */
+ reg_temp = ad_reg;//要配件的寄存器数值
+ for (bit_cout = 0; bit_cout < 8; bit_cout++)
+ {
+ if (reg_temp & 0x80) //MSB
+ {
+ CS1238_DOUT_H();
+ }
+ else
+ {
+ CS1238_DOUT_L();
+ }
+ reg_temp = reg_temp << 1;
+ CS1238_Clock();
+ }
+ /* 8: clk46 */
+ CS1238_Clock();
+ CS1238_DOUT_H();
+ CS1238_DOUT_IN();
+ CS1238IntEnable();
+ return ;
+}
+
+/**读CS1238寄存器*/
+static int32_t Read_CS1238_Config(void)
+{
+ uint16_t bit_cout = 0;
+ uint8_t reg_temp = 0x00;
+ //DOUT由高变低之后开始读取数据
+ CS1238_DOUT_OUT();
+ CS1238_DOUT_H();
+ CS1238_DOUT_IN();
+ CS1238_SCLK_L(); //时钟拉低
+ CS1238Var.CS1238Delay1mSCnt = 300;
+ CS1238IrqFlag = false;
+ while(CS1238IrqFlag == false) //等待芯片准备好
+ {
+ if(CS1238Var.CS1238Delay1mSCnt <= 0){
+ DBG_LOG("CS1238 Preparation Timeout...\r\n");
+ return 0; // 超时退出
+ }
+ }
+ CS1238IntDisable();
+ CS1238IrqFlag = false;
+
+ /* clk1-clk26 写期间不需要操作*/
+ for (bit_cout = 0; bit_cout < 26; bit_cout++)
+ {
+ CS1238_Clock(); //给一周期时钟
+ }
+ /* clk27 DOUT输出拉高*/
+ CS1238_Clock(); //给一周期时钟
+ CS1238_DOUT_H();
+ /* clk28 - clk29 发送写寄存器命令字 */
+ CS1238_Clock(); //给一周期时钟
+ CS1238_Clock(); //给一周期时钟
+
+ /* clk30 - clk36 发送读寄存器命令字 */
+ CS1238_DOUT_OUT();
+ reg_temp = READ_CONFIG_CMD << 1; //命令长度为 7bits (写0x56)左移1位
+ for (bit_cout = 0; bit_cout < 7; bit_cout++)
+ {
+ if (reg_temp & 0x80) //MSB
+ {
+ CS1238_DOUT_H();
+ }
+ else
+ {
+ CS1238_DOUT_L();
+ }
+ reg_temp = reg_temp << 1;
+ CS1238_Clock();
+ }
+ /* clk37，读寄存器模式改输入 */
+ CS1238_Clock();
+ CS1238_DOUT_IN();
+ for (bit_cout = 0; bit_cout < 8; bit_cout++)
+ {
+ CS1238_SCLK_H();
+ reg_temp <<= 1; //左移1位准备接受数据 初始默认0
+ CS1238_100NS(3);//延时300ns
+ if(GET_CS1238_DOUT() == true) //有数值则累加
+ reg_temp |= 1;
+ CS1238_SCLK_L();
+ CS1238_100NS(3);
+ }
+ /* 8: clk46 */
+ CS1238_Clock();
+ CS1238_DOUT_IN();
+ CS1238_DOUT_H();
+ CS1238IntEnable();
+ return reg_temp ;
+}
+/**读取CS1238的AD数*/
+static int32_t Read_CS1238_Ad_Data(void)
+{
+ uint16_t bit_cout = 0;
+ int32_t data_temp = 0;
+
+ /* clk1 ~ clk24 ADC数据*/
+ data_temp = 0;
+ for (bit_cout = 0; bit_cout < 24; bit_cout++)
+ {
+ CS1238_SCLK_H();
+ data_temp <<= 1; //左移1位准备接受数据 初始默认0
+ CS1238_100NS(3);//延时300ns
+ if(GET_CS1238_DOUT() == true) //有数值则累加
+ data_temp |= 1;
+ CS1238_SCLK_L();
+ CS1238_100NS(3);
+ }
+
+ /* clk25 ~ clk27 */
+ for (bit_cout = 24; bit_cout < 27; bit_cout++)
+ {
+ CS1238_Clock(); //给一周期时钟
+ }
+ CS1238_DOUT_H();
+ CS1238_SCLK_L();
+
+ if(data_temp > 0x7FFFFF) //取24位
+ {
+ data_temp |= 0xFF000000;
+ }
+ return data_temp;
+}
+
+void CS1238_IrqCallBack(void)
+{
+ CS1238IrqFlag = true;
+}
+void CS1238_Init(void)
+{
+ CS1238IrqFlag = false;
+ BuildDelay = false;
+ CS1238IntEnable();
+ CS1238Var.Ain1_AD = 0;
+ CS1238Var.Ain2_AD = 0;
+ CS1238Var.Temp_AD = 0;
+ CS1238Var.Jump_AD = 0;
+
+ CS1238Port = CH_SEL_A;
+ CS1238Hz = SPEED_SEL_640Hz;
+ CS1238PGA = PGA_SEL_128;
+
+ uint8_t read_reg = 0x00;
+ uint8_t set_reg = REFO_ON | CS1238Hz | CS1238PGA | CS1238Port;
+ CS1238_1MS(20);
+ Set_CS1238_Config(set_reg);
+ CS1238_1MS(20);
+ read_reg = Read_CS1238_Config();
+ CS1238_1MS(20);
+ if(read_reg != set_reg){
+ DBG_LOG("CS1238 Init ERR...\r\n");
+ DBG_LOG("set_reg = %02X\tread_reg = %02X\r\n",set_reg,read_reg);
+ InitFlag = false;
+ }
+ else {
+ DBG_LOG("CS1238 Init OK...\r\n");
+ //DBG_LOG("set_reg = %02X\tread_reg = %02X\r\n",set_reg,read_reg);
+ CS1238Port = read_reg & 0x03;
+ InitFlag = true;
+ }
+}
+void CS1238DataLoopCollect(void)
+{
+ static int32_t ad_array[PACK_NUM];
+ static uint8_t adcnt;
+ static uint8_t TimeOutmagcnt;
+
+ switch(CS1238Var.Status) {
+ case CS1238_STATUS_IDLE:{
+ break;}
+
+ case CS1238_STATUS_START:{
+ memset(&ad_array, 0x00, sizeof(ad_array));
+ adcnt = 0;
+ TimeOutmagcnt = 0;
+ memset(&CS1238Var, NULL, sizeof(CS1238Var));
+ if(BuildDelay == true)
+ {
+ BuildDelay = false;
+ if(CS1238Hz == SPEED_SEL_10Hz){
+ CS1238Var.CS1238Delay1mSCnt = tCon_10Hz;
+ }
+ if(CS1238Hz == SPEED_SEL_40Hz){
+ CS1238Var.CS1238Delay1mSCnt = tCon_40Hz;
+ }
+ if(CS1238Hz == SPEED_SEL_640Hz){
+ CS1238Var.CS1238Delay1mSCnt = tCon_640Hz;
+ }
+ if(CS1238Hz == SPEED_SEL6_1280Hz){
+ CS1238Var.CS1238Delay1mSCnt = tCon_1280Hz;
+ }
+ CS1238Var.Status = CS1238_STATUS_DELAY;
+ }
+ else
+ {
+ CS1238Var.Status = CS1238_STATUS_READ;
+ }
+ break;}
+
+ case CS1238_STATUS_DELAY:{
+ if(CS1238Var.CS1238Delay1mSCnt <= 0){
+ CS1238Var.Status = CS1238_STATUS_READ;
+ }
+ break;}
+
+ case CS1238_STATUS_READ:{
+ CS1238IrqFlag = false;
+ CS1238Var.CS1238Delay1mSCnt = 100;
+ CS1238Var.Status = CS1238_STATUS_WAIT_READ;
+ break;}
+
+ case CS1238_STATUS_WAIT_READ:{
+ if(CS1238Var.CS1238Delay1mSCnt <= 0){
+ CS1238Var.Status = CS1238_STATUS_READ;
+ TimeOutmagcnt++;
+ }
+ if(CS1238IrqFlag == true){
+ CS1238IrqFlag = false;
+ ad_array[adcnt++] = Read_CS1238_Ad_Data();
+ CS1238Var.Status = CS1238_STATUS_READ;
+ }
+ if(TimeOutmagcnt >= PACK_NUM){
+ TimeOutmagcnt = 0;
+ if(adcnt > 0){
+ if(CS1238Port == CH_SEL_A){
+ CS1238Var.Ain1_AD = IntFilter_32t(ad_array, adcnt, 4);
+ CS1238Ain1DataProcessCallBack(CS1238Var.Ain1_AD);
+ }
+ if(CS1238Port == CH_SEL_B){
+ CS1238Var.Ain2_AD = IntFilter_32t(ad_array, adcnt, 4);
+ CS1238Ain2DataProcessCallBack(CS1238Var.Ain2_AD);
+ }
+ if(CS1238Port == CH_SEL_TEMP){
+ CS1238Var.Temp_AD = IntFilter_32t(ad_array, adcnt, 4);
+ CS1238TempDataProcessCallBack(CS1238Var.Temp_AD);
+ }
+ if(CS1238Port == CH_SEL_JUMP){
+ CS1238Var.Jump_AD = IntFilter_32t(ad_array, adcnt, 4);
+ CS1238JumpDataProcessCallBack(CS1238Var.Jump_AD);
+ }
+ CS1238Var.Status = CS1238_STATUS_CH_SEL;
+ }
+ else{
+ if(CS1238Port == CH_SEL_A){
+ DBG_LOG("CS1238 CHA TimeOut...\r\n");
+ }
+ if(CS1238Port == CH_SEL_B){
+ DBG_LOG("CS1238 CHB TimeOut...\r\n");
+ }
+ if(CS1238Port == CH_SEL_TEMP){
+ DBG_LOG("CS1238 Temp TimeOut...\r\n");
+ }
+ if(CS1238Port == CH_SEL_JUMP){
+ DBG_LOG("CS1238 Jump TimeOut...\r\n");
+ }
+ CS1238Var.Status = CS1238_STATUS_CH_SEL;
+ }
+ }
+ if(adcnt >= PACK_NUM){
+ if(CS1238Port == CH_SEL_A){
+ CS1238Var.Ain1_AD = IntFilter_32t(ad_array, adcnt, 4);
+ CS1238Ain1DataProcessCallBack(CS1238Var.Ain1_AD);
+ }
+ if(CS1238Port == CH_SEL_B){
+ CS1238Var.Ain2_AD = IntFilter_32t(ad_array, adcnt, 4);
+ CS1238Ain2DataProcessCallBack(CS1238Var.Ain2_AD);
+ }
+ if(CS1238Port == CH_SEL_TEMP){
+ CS1238Var.Temp_AD = IntFilter_32t(ad_array, adcnt, 4);
+ CS1238TempDataProcessCallBack(CS1238Var.Temp_AD);
+ }
+ if(CS1238Port == CH_SEL_JUMP){
+ CS1238Var.Jump_AD = IntFilter_32t(ad_array, adcnt, 4);
+ CS1238JumpDataProcessCallBack(CS1238Var.Jump_AD);
+ }
+ CS1238Var.Status = CS1238_STATUS_CH_SEL;
+ }
+ break;}
+
+ case CS1238_STATUS_CH_SEL:{
+ CS1238Var.Status = CS1238_STATUS_STOP;
+ BuildDelay = false;
+ uint8_t read_reg;
+ if(CS1238Port == CH_SEL_A){
+#if(PORT_TEMP == 1)
+ read_reg = Read_CS1238_Config();
+ Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_TEMP);
+ CS1238Port = CH_SEL_TEMP;
+ BuildDelay = true;
+ break;
+#endif
+#if(PORT_JUMP == 1)
+ read_reg = Read_CS1238_Config();
+ Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_JUMP);
+ CS1238Port = CH_SEL_JUMP;
+ BuildDelay = true;
+ break;
+#endif
+ }
+
+ if(CS1238Port == CH_SEL_B){
+#if(PORT_TEMP == 1)
+ read_reg = Read_CS1238_Config();
+ Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_TEMP);
+ CS1238Port = CH_SEL_TEMP;
+ BuildDelay = true;
+ break;
+#endif
+#if(PORT_JUMP == 1)
+ read_reg = Read_CS1238_Config();
+ Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_JUMP);
+ CS1238Port = CH_SEL_JUMP;
+ BuildDelay = true;
+ break;
+#endif
+#if(PORT_A == 1)
+ read_reg = Read_CS1238_Config();
+ Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_A);
+ CS1238Port = CH_SEL_A;
+ BuildDelay = true;
+ break;
+#endif
+ }
+
+ if(CS1238Port == CH_SEL_TEMP){
+#if(PORT_JUMP == 1)
+ read_reg = Read_CS1238_Config();
+ Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_JUMP);
+ CS1238Port = CH_SEL_JUMP;
+ BuildDelay = true;
+ break;
+#endif
+#if(PORT_A == 1)
+ read_reg = Read_CS1238_Config();
+ Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_A);
+ CS1238Port = CH_SEL_A;
+ BuildDelay = true;
+ break;
+#endif
+ }
+
+ if(CS1238Port == CH_SEL_JUMP){
+#if(PORT_A == 1)
+ read_reg = Read_CS1238_Config();
+ Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_A);
+ CS1238Port = CH_SEL_A;
+ BuildDelay = true;
+ break;
+#endif
+#if(PORT_TEMP == 1)
+ read_reg = Read_CS1238_Config();
+ Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_TEMP);
+ CS1238Port = CH_SEL_TEMP;
+ BuildDelay = true;
+ break;
+#endif
+ }
+ break;}
+
+ case CS1238_STATUS_STOP:{
+ //CS1238Stop();
+ //CS1238Var.Status = CS1238_STATUS_IDLE;
+ CS1238Var.Status = CS1238_STATUS_START;//持续工作
+ break;}
+ }
+}
+void CS12381mSRoutine(void)
+{
+ if(CS1238Var.CS1238Delay1mSCnt > 0)
+ CS1238Var.CS1238Delay1mSCnt--;
+}
+void CS1238Start(void)
+{
+ CS1238_WakeUp();
+ CS1238_1MS(2);
+ BuildDelay = true;
+ CS1238IntEnable();
+ if(!InitFlag){
+ CS1238_Init();
+ return;
+ }
+ CS1238Var.Status = CS1238_STATUS_START;
+}
+void CS1238Stop(void)
+{
+ CS1238IntDisable();
+ CS1238_Sleep();
+}
+
+
+
diff --git a/Project/HC32F460/source/Module/CS1237/CS1237_RIGHRLOW.h b/Project/HC32F460/source/Module/CS1237/CS1237_RIGHRLOW.h
new file mode 100644
index 0000000..354d39d
--- /dev/null
+++ b/Project/HC32F460/source/Module/CS1237/CS1237_RIGHRLOW.h
@@ -0,0 +1,91 @@
+#include "bsp.h"
+
+#ifndef _CS1238_H_
+#define _CS1238_H_
+
+#define READ_CONFIG_CMD 0x56
+#define WRITE_CONFIG_CMD 0x65
+
+#define CONFIG_RST 0x0C
+
+#define REFO_OFF 0x40
+#define REFO_ON 0x00
+
+#define SPEED_SEL_10Hz 0x00
+#define SPEED_SEL_40Hz 0x10
+#define SPEED_SEL_640Hz 0x20
+#define SPEED_SEL6_1280Hz 0x30
+
+#define PGA_SEL_1 0x00
+#define PGA_SEL_2 0x04
+#define PGA_SEL_64 0x08
+#define PGA_SEL_128 0x0C
+
+#define CH_SEL_A 0x00
+#define CH_SEL_B 0x01
+#define CH_SEL_TEMP 0x02
+#define CH_SEL_JUMP 0x03
+
+#define CS1238_DOUT_OUT() SetBit(((uint32_t)&M0P_GPIO->PADIR + CS1238_DOUT_PORTx), CS1238_DOUT_PINx, 0)
+#define CS1238_DOUT_IN() SetBit(((uint32_t)&M0P_GPIO->PADIR + CS1238_DOUT_PORTx), CS1238_DOUT_PINx, 1)
+#define CS1238_DOUT_H() SET_CS1238_DOUT()
+#define CS1238_DOUT_L() CLR_CS1238_DOUT()
+
+#define CS1238_SCLK_H() SET_CS1238_SCLK()
+#define CS1238_SCLK_L() CLR_CS1238_SCLK()
+
+#define CS1238_1US(x) delay_us(x) //1usʱ
+#define CS1238_100NS(x) delay_ns(x) //100nsʱ
+#define CS1238_1MS(x) delay_ms(x) //1msʱ
+
+/*Definition of conversion time corresponding to repeatability setting*/
+/*
+ 10Hz //ʱ300ms
+ 40Hz //ʱ75ms
+ 640Hz //ʱ6.25ms
+ 1280Hz //ʱ3.125ms
+*/
+#define tCon_10Hz 300 /* ms. */
+#define tCon_40Hz 75 /* ms. */
+#define tCon_640Hz 7 /* ms. */
+#define tCon_1280Hz 4 /* ms. */
+
+#define PORT_A 1 //ɼͨA
+#define PORT_B 1 //ɼͨB
+#define PORT_TEMP 0 //ɼ¶
+#define PORT_JUMP 0 //ڶ̲ɼ
+#define PACK_NUM 10 //һβɼݰ
+
+typedef enum{
+ CS1238_STATUS_IDLE,
+ CS1238_STATUS_START,
+ CS1238_STATUS_DELAY,
+ CS1238_STATUS_READ,
+ CS1238_STATUS_WAIT_READ,
+ CS1238_STATUS_CH_SEL,
+ CS1238_STATUS_STOP,
+}CS1238Status_m;
+
+typedef struct{
+ CS1238Status_m Status;
+ uint32_t CS1238Delay1mSCnt;
+
+ int32_t Ain1_AD;//AIN1ad
+ int32_t Ain2_AD;//AIN2ad
+ int32_t Temp_AD;//¶ad
+ int32_t Jump_AD;//ڶad
+}
+CS1238Var_t;
+extern CS1238Var_t CS1238Var;
+
+void CS1238_Init(void);
+void CS1238_IrqCallBack(void);
+void CS1238DataLoopCollect(void);
+void CS1238LoopHandler(void);
+void CS12381mSRoutine(void);
+void CS1238Start(void);
+void CS1238Stop(void);
+#endif
+
+
+
diff --git a/Project/HC32F460/source/Module/CS1237/CS1237_RIGHTUP.c b/Project/HC32F460/source/Module/CS1237/CS1237_RIGHTUP.c
new file mode 100644
index 0000000..a10e7c8
--- /dev/null
+++ b/Project/HC32F460/source/Module/CS1237/CS1237_RIGHTUP.c
@@ -0,0 +1,485 @@
+#include "CS1238.h"
+#include "UartDebug.h"
+#include "bsp.h"
+#include "main.h"
+#include "Algorithm.h"
+
+CS1238Var_t CS1238Var;
+static bool InitFlag;
+static bool CS1238IrqFlag;
+static bool BuildDelay;
+static uint8_t CS1238Port;
+static uint8_t CS1238Hz;
+static uint8_t CS1238PGA;
+extern void CS1238Ain1DataProcessCallBack(int32_t AD);
+extern void CS1238Ain2DataProcessCallBack(int32_t AD);
+extern void CS1238TempDataProcessCallBack(int32_t AD);
+extern void CS1238JumpDataProcessCallBack(int32_t AD);
+
+/** cs1238 时序时钟*/
+static void CS1238_Clock(void)
+{
+ CS1238_SCLK_H();
+ CS1238_100NS(3);
+ CS1238_SCLK_L();
+ CS1238_100NS(3);
+}
+/** cs1238 休眠*/
+static void CS1238_Sleep(void)
+{
+ CS1238_SCLK_H();
+ CS1238_1US(150);
+}
+/** cs1238 唤醒*/
+static void CS1238_WakeUp(void)
+{
+ CS1238_SCLK_L();
+ CS1238_1US(20);
+}
+/**设置CS1238寄存器*/
+static void Set_CS1238_Config(uint8_t ad_reg)
+{
+ uint16_t bit_cout = 0;
+ uint8_t reg_temp = 0x00;
+ //DOUT由高变低之后开始读取数据
+ CS1238_DOUT_OUT();
+ CS1238_DOUT_H();
+ CS1238_DOUT_IN();
+ CS1238_SCLK_L(); //时钟拉低
+ CS1238Var.CS1238Delay1mSCnt = 300;
+ CS1238IrqFlag = false;
+ while(CS1238IrqFlag == false) //等待芯片准备好
+ {
+ if(CS1238Var.CS1238Delay1mSCnt <= 0){
+ DBG_LOG("CS1238 Preparation Timeout...\r\n");
+ return; // 超时退出
+ }
+ }
+ CS1238IntDisable();
+ CS1238IrqFlag = false;
+
+
+ /* clk1-clk26 写期间不需要操作*/
+ for (bit_cout = 0; bit_cout < 26; bit_cout++)
+ {
+ CS1238_Clock(); //给一周期时钟
+ }
+ /* clk27 DOUT输出拉高*/
+ CS1238_Clock(); //给一周期时钟
+ CS1238_DOUT_H();
+ /* clk28 - clk29 发送写寄存器命令字 */
+ CS1238_Clock(); //给一周期时钟
+ CS1238_Clock(); //给一周期时钟
+
+ /* clk30 - clk36 发送写寄存器命令字 */
+ CS1238_DOUT_OUT();
+ reg_temp = WRITE_CONFIG_CMD << 1; //命令长度为 7bits (写0x65)左移1位
+ for (bit_cout = 0; bit_cout < 7; bit_cout++)
+ {
+ if (reg_temp & 0x80) //MSB
+ {
+ CS1238_DOUT_H();
+ }
+ else
+ {
+ CS1238_DOUT_L();
+ }
+ reg_temp = reg_temp << 1;
+ CS1238_Clock();
+ }
+ /* clk37写寄存器模式还是输出 */
+ CS1238_Clock();
+ /* clk38 ~ clk45 写入寄存器值 */
+ reg_temp = ad_reg;//要配件的寄存器数值
+ for (bit_cout = 0; bit_cout < 8; bit_cout++)
+ {
+ if (reg_temp & 0x80) //MSB
+ {
+ CS1238_DOUT_H();
+ }
+ else
+ {
+ CS1238_DOUT_L();
+ }
+ reg_temp = reg_temp << 1;
+ CS1238_Clock();
+ }
+ /* 8: clk46 */
+ CS1238_Clock();
+ CS1238_DOUT_H();
+ CS1238_DOUT_IN();
+ CS1238IntEnable();
+ return ;
+}
+
+/**读CS1238寄存器*/
+static int32_t Read_CS1238_Config(void)
+{
+ uint16_t bit_cout = 0;
+ uint8_t reg_temp = 0x00;
+ //DOUT由高变低之后开始读取数据
+ CS1238_DOUT_OUT();
+ CS1238_DOUT_H();
+ CS1238_DOUT_IN();
+ CS1238_SCLK_L(); //时钟拉低
+ CS1238Var.CS1238Delay1mSCnt = 300;
+ CS1238IrqFlag = false;
+ while(CS1238IrqFlag == false) //等待芯片准备好
+ {
+ if(CS1238Var.CS1238Delay1mSCnt <= 0){
+ DBG_LOG("CS1238 Preparation Timeout...\r\n");
+ return 0; // 超时退出
+ }
+ }
+ CS1238IntDisable();
+ CS1238IrqFlag = false;
+
+ /* clk1-clk26 写期间不需要操作*/
+ for (bit_cout = 0; bit_cout < 26; bit_cout++)
+ {
+ CS1238_Clock(); //给一周期时钟
+ }
+ /* clk27 DOUT输出拉高*/
+ CS1238_Clock(); //给一周期时钟
+ CS1238_DOUT_H();
+ /* clk28 - clk29 发送写寄存器命令字 */
+ CS1238_Clock(); //给一周期时钟
+ CS1238_Clock(); //给一周期时钟
+
+ /* clk30 - clk36 发送读寄存器命令字 */
+ CS1238_DOUT_OUT();
+ reg_temp = READ_CONFIG_CMD << 1; //命令长度为 7bits (写0x56)左移1位
+ for (bit_cout = 0; bit_cout < 7; bit_cout++)
+ {
+ if (reg_temp & 0x80) //MSB
+ {
+ CS1238_DOUT_H();
+ }
+ else
+ {
+ CS1238_DOUT_L();
+ }
+ reg_temp = reg_temp << 1;
+ CS1238_Clock();
+ }
+ /* clk37，读寄存器模式改输入 */
+ CS1238_Clock();
+ CS1238_DOUT_IN();
+ for (bit_cout = 0; bit_cout < 8; bit_cout++)
+ {
+ CS1238_SCLK_H();
+ reg_temp <<= 1; //左移1位准备接受数据 初始默认0
+ CS1238_100NS(3);//延时300ns
+ if(GET_CS1238_DOUT() == true) //有数值则累加
+ reg_temp |= 1;
+ CS1238_SCLK_L();
+ CS1238_100NS(3);
+ }
+ /* 8: clk46 */
+ CS1238_Clock();
+ CS1238_DOUT_IN();
+ CS1238_DOUT_H();
+ CS1238IntEnable();
+ return reg_temp ;
+}
+/**读取CS1238的AD数*/
+static int32_t Read_CS1238_Ad_Data(void)
+{
+ uint16_t bit_cout = 0;
+ int32_t data_temp = 0;
+
+ /* clk1 ~ clk24 ADC数据*/
+ data_temp = 0;
+ for (bit_cout = 0; bit_cout < 24; bit_cout++)
+ {
+ CS1238_SCLK_H();
+ data_temp <<= 1; //左移1位准备接受数据 初始默认0
+ CS1238_100NS(3);//延时300ns
+ if(GET_CS1238_DOUT() == true) //有数值则累加
+ data_temp |= 1;
+ CS1238_SCLK_L();
+ CS1238_100NS(3);
+ }
+
+ /* clk25 ~ clk27 */
+ for (bit_cout = 24; bit_cout < 27; bit_cout++)
+ {
+ CS1238_Clock(); //给一周期时钟
+ }
+ CS1238_DOUT_H();
+ CS1238_SCLK_L();
+
+ if(data_temp > 0x7FFFFF) //取24位
+ {
+ data_temp |= 0xFF000000;
+ }
+ return data_temp;
+}
+
+void CS1238_IrqCallBack(void)
+{
+ CS1238IrqFlag = true;
+}
+void CS1238_Init(void)
+{
+ CS1238IrqFlag = false;
+ BuildDelay = false;
+ CS1238IntEnable();
+ CS1238Var.Ain1_AD = 0;
+ CS1238Var.Ain2_AD = 0;
+ CS1238Var.Temp_AD = 0;
+ CS1238Var.Jump_AD = 0;
+
+ CS1238Port = CH_SEL_A;
+ CS1238Hz = SPEED_SEL_640Hz;
+ CS1238PGA = PGA_SEL_128;
+
+ uint8_t read_reg = 0x00;
+ uint8_t set_reg = REFO_ON | CS1238Hz | CS1238PGA | CS1238Port;
+ CS1238_1MS(20);
+ Set_CS1238_Config(set_reg);
+ CS1238_1MS(20);
+ read_reg = Read_CS1238_Config();
+ CS1238_1MS(20);
+ if(read_reg != set_reg){
+ DBG_LOG("CS1238 Init ERR...\r\n");
+ DBG_LOG("set_reg = %02X\tread_reg = %02X\r\n",set_reg,read_reg);
+ InitFlag = false;
+ }
+ else {
+ DBG_LOG("CS1238 Init OK...\r\n");
+ //DBG_LOG("set_reg = %02X\tread_reg = %02X\r\n",set_reg,read_reg);
+ CS1238Port = read_reg & 0x03;
+ InitFlag = true;
+ }
+}
+void CS1238DataLoopCollect(void)
+{
+ static int32_t ad_array[PACK_NUM];
+ static uint8_t adcnt;
+ static uint8_t TimeOutmagcnt;
+
+ switch(CS1238Var.Status) {
+ case CS1238_STATUS_IDLE:{
+ break;}
+
+ case CS1238_STATUS_START:{
+ memset(&ad_array, 0x00, sizeof(ad_array));
+ adcnt = 0;
+ TimeOutmagcnt = 0;
+ memset(&CS1238Var, NULL, sizeof(CS1238Var));
+ if(BuildDelay == true)
+ {
+ BuildDelay = false;
+ if(CS1238Hz == SPEED_SEL_10Hz){
+ CS1238Var.CS1238Delay1mSCnt = tCon_10Hz;
+ }
+ if(CS1238Hz == SPEED_SEL_40Hz){
+ CS1238Var.CS1238Delay1mSCnt = tCon_40Hz;
+ }
+ if(CS1238Hz == SPEED_SEL_640Hz){
+ CS1238Var.CS1238Delay1mSCnt = tCon_640Hz;
+ }
+ if(CS1238Hz == SPEED_SEL6_1280Hz){
+ CS1238Var.CS1238Delay1mSCnt = tCon_1280Hz;
+ }
+ CS1238Var.Status = CS1238_STATUS_DELAY;
+ }
+ else
+ {
+ CS1238Var.Status = CS1238_STATUS_READ;
+ }
+ break;}
+
+ case CS1238_STATUS_DELAY:{
+ if(CS1238Var.CS1238Delay1mSCnt <= 0){
+ CS1238Var.Status = CS1238_STATUS_READ;
+ }
+ break;}
+
+ case CS1238_STATUS_READ:{
+ CS1238IrqFlag = false;
+ CS1238Var.CS1238Delay1mSCnt = 100;
+ CS1238Var.Status = CS1238_STATUS_WAIT_READ;
+ break;}
+
+ case CS1238_STATUS_WAIT_READ:{
+ if(CS1238Var.CS1238Delay1mSCnt <= 0){
+ CS1238Var.Status = CS1238_STATUS_READ;
+ TimeOutmagcnt++;
+ }
+ if(CS1238IrqFlag == true){
+ CS1238IrqFlag = false;
+ ad_array[adcnt++] = Read_CS1238_Ad_Data();
+ CS1238Var.Status = CS1238_STATUS_READ;
+ }
+ if(TimeOutmagcnt >= PACK_NUM){
+ TimeOutmagcnt = 0;
+ if(adcnt > 0){
+ if(CS1238Port == CH_SEL_A){
+ CS1238Var.Ain1_AD = IntFilter_32t(ad_array, adcnt, 4);
+ CS1238Ain1DataProcessCallBack(CS1238Var.Ain1_AD);
+ }
+ if(CS1238Port == CH_SEL_B){
+ CS1238Var.Ain2_AD = IntFilter_32t(ad_array, adcnt, 4);
+ CS1238Ain2DataProcessCallBack(CS1238Var.Ain2_AD);
+ }
+ if(CS1238Port == CH_SEL_TEMP){
+ CS1238Var.Temp_AD = IntFilter_32t(ad_array, adcnt, 4);
+ CS1238TempDataProcessCallBack(CS1238Var.Temp_AD);
+ }
+ if(CS1238Port == CH_SEL_JUMP){
+ CS1238Var.Jump_AD = IntFilter_32t(ad_array, adcnt, 4);
+ CS1238JumpDataProcessCallBack(CS1238Var.Jump_AD);
+ }
+ CS1238Var.Status = CS1238_STATUS_CH_SEL;
+ }
+ else{
+ if(CS1238Port == CH_SEL_A){
+ DBG_LOG("CS1238 CHA TimeOut...\r\n");
+ }
+ if(CS1238Port == CH_SEL_B){
+ DBG_LOG("CS1238 CHB TimeOut...\r\n");
+ }
+ if(CS1238Port == CH_SEL_TEMP){
+ DBG_LOG("CS1238 Temp TimeOut...\r\n");
+ }
+ if(CS1238Port == CH_SEL_JUMP){
+ DBG_LOG("CS1238 Jump TimeOut...\r\n");
+ }
+ CS1238Var.Status = CS1238_STATUS_CH_SEL;
+ }
+ }
+ if(adcnt >= PACK_NUM){
+ if(CS1238Port == CH_SEL_A){
+ CS1238Var.Ain1_AD = IntFilter_32t(ad_array, adcnt, 4);
+ CS1238Ain1DataProcessCallBack(CS1238Var.Ain1_AD);
+ }
+ if(CS1238Port == CH_SEL_B){
+ CS1238Var.Ain2_AD = IntFilter_32t(ad_array, adcnt, 4);
+ CS1238Ain2DataProcessCallBack(CS1238Var.Ain2_AD);
+ }
+ if(CS1238Port == CH_SEL_TEMP){
+ CS1238Var.Temp_AD = IntFilter_32t(ad_array, adcnt, 4);
+ CS1238TempDataProcessCallBack(CS1238Var.Temp_AD);
+ }
+ if(CS1238Port == CH_SEL_JUMP){
+ CS1238Var.Jump_AD = IntFilter_32t(ad_array, adcnt, 4);
+ CS1238JumpDataProcessCallBack(CS1238Var.Jump_AD);
+ }
+ CS1238Var.Status = CS1238_STATUS_CH_SEL;
+ }
+ break;}
+
+ case CS1238_STATUS_CH_SEL:{
+ CS1238Var.Status = CS1238_STATUS_STOP;
+ BuildDelay = false;
+ uint8_t read_reg;
+ if(CS1238Port == CH_SEL_A){
+#if(PORT_TEMP == 1)
+ read_reg = Read_CS1238_Config();
+ Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_TEMP);
+ CS1238Port = CH_SEL_TEMP;
+ BuildDelay = true;
+ break;
+#endif
+#if(PORT_JUMP == 1)
+ read_reg = Read_CS1238_Config();
+ Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_JUMP);
+ CS1238Port = CH_SEL_JUMP;
+ BuildDelay = true;
+ break;
+#endif
+ }
+
+ if(CS1238Port == CH_SEL_B){
+#if(PORT_TEMP == 1)
+ read_reg = Read_CS1238_Config();
+ Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_TEMP);
+ CS1238Port = CH_SEL_TEMP;
+ BuildDelay = true;
+ break;
+#endif
+#if(PORT_JUMP == 1)
+ read_reg = Read_CS1238_Config();
+ Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_JUMP);
+ CS1238Port = CH_SEL_JUMP;
+ BuildDelay = true;
+ break;
+#endif
+#if(PORT_A == 1)
+ read_reg = Read_CS1238_Config();
+ Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_A);
+ CS1238Port = CH_SEL_A;
+ BuildDelay = true;
+ break;
+#endif
+ }
+
+ if(CS1238Port == CH_SEL_TEMP){
+#if(PORT_JUMP == 1)
+ read_reg = Read_CS1238_Config();
+ Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_JUMP);
+ CS1238Port = CH_SEL_JUMP;
+ BuildDelay = true;
+ break;
+#endif
+#if(PORT_A == 1)
+ read_reg = Read_CS1238_Config();
+ Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_A);
+ CS1238Port = CH_SEL_A;
+ BuildDelay = true;
+ break;
+#endif
+ }
+
+ if(CS1238Port == CH_SEL_JUMP){
+#if(PORT_A == 1)
+ read_reg = Read_CS1238_Config();
+ Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_A);
+ CS1238Port = CH_SEL_A;
+ BuildDelay = true;
+ break;
+#endif
+#if(PORT_TEMP == 1)
+ read_reg = Read_CS1238_Config();
+ Set_CS1238_Config((read_reg & 0xFC) | CH_SEL_TEMP);
+ CS1238Port = CH_SEL_TEMP;
+ BuildDelay = true;
+ break;
+#endif
+ }
+ break;}
+
+ case CS1238_STATUS_STOP:{
+ //CS1238Stop();
+ //CS1238Var.Status = CS1238_STATUS_IDLE;
+ CS1238Var.Status = CS1238_STATUS_START;//持续工作
+ break;}
+ }
+}
+void CS12381mSRoutine(void)
+{
+ if(CS1238Var.CS1238Delay1mSCnt > 0)
+ CS1238Var.CS1238Delay1mSCnt--;
+}
+void CS1238Start(void)
+{
+ CS1238_WakeUp();
+ CS1238_1MS(2);
+ BuildDelay = true;
+ CS1238IntEnable();
+ if(!InitFlag){
+ CS1238_Init();
+ return;
+ }
+ CS1238Var.Status = CS1238_STATUS_START;
+}
+void CS1238Stop(void)
+{
+ CS1238IntDisable();
+ CS1238_Sleep();
+}
+
+
+
diff --git a/Project/HC32F460/source/Module/CS1237/CS1237_RIGHTUP.h b/Project/HC32F460/source/Module/CS1237/CS1237_RIGHTUP.h
new file mode 100644
index 0000000..354d39d
--- /dev/null
+++ b/Project/HC32F460/source/Module/CS1237/CS1237_RIGHTUP.h
@@ -0,0 +1,91 @@
+#include "bsp.h"
+
+#ifndef _CS1238_H_
+#define _CS1238_H_
+
+#define READ_CONFIG_CMD 0x56
+#define WRITE_CONFIG_CMD 0x65
+
+#define CONFIG_RST 0x0C
+
+#define REFO_OFF 0x40
+#define REFO_ON 0x00
+
+#define SPEED_SEL_10Hz 0x00
+#define SPEED_SEL_40Hz 0x10
+#define SPEED_SEL_640Hz 0x20
+#define SPEED_SEL6_1280Hz 0x30
+
+#define PGA_SEL_1 0x00
+#define PGA_SEL_2 0x04
+#define PGA_SEL_64 0x08
+#define PGA_SEL_128 0x0C
+
+#define CH_SEL_A 0x00
+#define CH_SEL_B 0x01
+#define CH_SEL_TEMP 0x02
+#define CH_SEL_JUMP 0x03
+
+#define CS1238_DOUT_OUT() SetBit(((uint32_t)&M0P_GPIO->PADIR + CS1238_DOUT_PORTx), CS1238_DOUT_PINx, 0)
+#define CS1238_DOUT_IN() SetBit(((uint32_t)&M0P_GPIO->PADIR + CS1238_DOUT_PORTx), CS1238_DOUT_PINx, 1)
+#define CS1238_DOUT_H() SET_CS1238_DOUT()
+#define CS1238_DOUT_L() CLR_CS1238_DOUT()
+
+#define CS1238_SCLK_H() SET_CS1238_SCLK()
+#define CS1238_SCLK_L() CLR_CS1238_SCLK()
+
+#define CS1238_1US(x) delay_us(x) //1usʱ
+#define CS1238_100NS(x) delay_ns(x) //100nsʱ
+#define CS1238_1MS(x) delay_ms(x) //1msʱ
+
+/*Definition of conversion time corresponding to repeatability setting*/
+/*
+ 10Hz //ʱ300ms
+ 40Hz //ʱ75ms
+ 640Hz //ʱ6.25ms
+ 1280Hz //ʱ3.125ms
+*/
+#define tCon_10Hz 300 /* ms. */
+#define tCon_40Hz 75 /* ms. */
+#define tCon_640Hz 7 /* ms. */
+#define tCon_1280Hz 4 /* ms. */
+
+#define PORT_A 1 //ɼͨA
+#define PORT_B 1 //ɼͨB
+#define PORT_TEMP 0 //ɼ¶
+#define PORT_JUMP 0 //ڶ̲ɼ
+#define PACK_NUM 10 //һβɼݰ
+
+typedef enum{
+ CS1238_STATUS_IDLE,
+ CS1238_STATUS_START,
+ CS1238_STATUS_DELAY,
+ CS1238_STATUS_READ,
+ CS1238_STATUS_WAIT_READ,
+ CS1238_STATUS_CH_SEL,
+ CS1238_STATUS_STOP,
+}CS1238Status_m;
+
+typedef struct{
+ CS1238Status_m Status;
+ uint32_t CS1238Delay1mSCnt;
+
+ int32_t Ain1_AD;//AIN1ad
+ int32_t Ain2_AD;//AIN2ad
+ int32_t Temp_AD;//¶ad
+ int32_t Jump_AD;//ڶad
+}
+CS1238Var_t;
+extern CS1238Var_t CS1238Var;
+
+void CS1238_Init(void);
+void CS1238_IrqCallBack(void);
+void CS1238DataLoopCollect(void);
+void CS1238LoopHandler(void);
+void CS12381mSRoutine(void);
+void CS1238Start(void);
+void CS1238Stop(void);
+#endif
+
+
+
diff --git a/Project/HC32F460/source/User/Inc/Algorithm.h b/Project/HC32F460/source/User/Inc/Algorithm.h
new file mode 100644
index 0000000..dd97796
--- /dev/null
+++ b/Project/HC32F460/source/User/Inc/Algorithm.h
@@ -0,0 +1,55 @@
+#ifndef __ALGORITHM_H
+#define __ALGORITHM_H
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define CRC16_BASE 0xA001
+
+
+// ֵֵṹ
+typedef struct {
+ bool peaks_positive; // зֵǷ0
+ bool valleys_negative; // йֵǷС0
+ int peak_count; // ķֵ
+ int valley_count; // Ĺֵ
+} PeakValleyCheck;
+
+// Ʒṹ
+typedef struct {
+ double slope; // б
+ int sign_changes; // ű仯
+ char trend_type; //
+ char steepness; // Ͷ
+} TrendResult;
+
+PeakValleyCheck check_peaks_valleys(int data[], int length);
+TrendResult analyze_trend(int data[], int length);
+float calculateAverage(int *arr, int size);
+double slope(int32_t *x_data, int32_t *y_data, int n) ;
+long long power(int base, unsigned int exponent);
+int IntFilter_16t(int16_t *Data, uint8_t Cnt, uint8_t FilterCnt);
+int IntFilter_32t(int32_t *Data, uint8_t Cnt, uint8_t FilterCnt);
+uint32_t IntFilter_u32t(uint32_t *Data, uint8_t Cnt, uint8_t FilterCnt);
+float IntFilter_Float(float *Data, uint8_t Cnt, uint8_t FilterCnt);
+uint32_t AverageFilter_u32t(uint32_t *Data, uint8_t Cnt);
+int AverageFilter_32t(int32_t *Data, uint8_t Cnt);
+void Fitting_Polynomial(double *AD, double *Actual, uint8_t Cnt);
+float get_K(uint8_t count , int32_t *dataCol_X, int32_t *dataRow_Y);
+int8_t TrendAnalyse(int32_t *Data, uint8_t Cnt, int32_t VPT);
+void Waveform_Up(int32_t *Data, uint8_t dCnt, uint8_t pCnt, int32_t *vlue);
+void Waveform_Down(int32_t *Data, uint8_t dCnt, uint8_t pCnt, int32_t *vlue);
+bool count_most_greater(int32_t *arr, uint8_t size, int32_t target);
+bool count_greater(int32_t *arr, uint8_t size, int32_t target);
+bool count_smaller(int32_t *arr, uint8_t size, int32_t target);
+uint16_t CRC_Modbus(uint16_t wBase, uint8_t *para, uint16_t length);
+uint8_t CRC_Sum(uint8_t *_pbuff, uint16_t _cmdLen);
+bool isAllZero(uint8_t *arr, int size);
+#endif
+
+
+
diff --git a/Project/HC32F460/source/User/Inc/Debug.h b/Project/HC32F460/source/User/Inc/Debug.h
new file mode 100644
index 0000000..d61e4db
--- /dev/null
+++ b/Project/HC32F460/source/User/Inc/Debug.h
@@ -0,0 +1,45 @@
+#ifndef __DEBUG_H
+#define __DEBUG_H
+
+#include "bsp.h"
+
+#if (USE_DEBUG != 0)
+
+#define BUFSIZE 128
+#define DEBUG_BUFF_SIZE_MAX 512
+
+void vcom_Send( char *format, ... );
+void vcom_Send2(uint8_t *sData, uint16_t len);
+
+#define DBG_LOG2(x, y) vcom_Send2(x, y) //ӡȳDEBUG_BUFF_SIZE_MAXϢ
+#define DBG_LOG(...) vcom_Send(__VA_ARGS__)
+#define DBG_LOG_F(fmt,arg...) LOG("[%s] "fmt,__FUNCTION__,##arg)
+
+#define DBG_ARRAY(ARRAY,SIZE) { \
+ if(ARRAY != NULL) { \
+ for(int i = 0; i < SIZE; i++) { \
+ DBG_LOG("%02x ",ARRAY[i]); \
+ } \
+ DBG_LOG("\r\n"); \
+ } \
+}
+
+typedef void (*DebugExec)(int argc, char *argv[]);
+
+typedef struct{
+ char *DBGCmd;
+ DebugExec DBGExec;
+}DBGFunType;
+
+void DebugUartIRQ(char Data);
+void DebugLoopHandler(void);
+void Dbg1msRoutine(void);
+#else
+
+#define DBG_LOG2(x, y)
+#define DBG_LOG(...)
+#define DBG_LOG_F(fmt,arg...)
+#define DBG_ARRAY(ARRAY,SIZE)
+
+#endif
+#endif
diff --git a/Project/HC32F460/source/User/Inc/Encryption.h b/Project/HC32F460/source/User/Inc/Encryption.h
index 7067945..bed95e7 100644
--- a/Project/HC32F460/source/User/Inc/Encryption.h
+++ b/Project/HC32F460/source/User/Inc/Encryption.h
@@ -1,5 +1,5 @@
-#ifndef __EPT__
-#define __EPT__
+#ifndef __ENCRYPTION_H__
+#define __ENCRYPTION_H__
void Encrypt_Code(unsigned char *data, unsigned char *EPT_data);
void Decrypt_Code(unsigned char *EPT_data,unsigned char *DPT_data);
diff --git a/Project/HC32F460/source/User/Inc/bsp.h b/Project/HC32F460/source/User/Inc/bsp.h
index 694c601..b33b57b 100644
--- a/Project/HC32F460/source/User/Inc/bsp.h
+++ b/Project/HC32F460/source/User/Inc/bsp.h
@@ -9,123 +9,47 @@
#include "hc32_ddl.h"
-//#define WATCH_DOG 1
+/*ģر*/
+#define USE_DEBUG 1 //DEBUGأ0رգ1
+#define USE_VBAT_AD 0 //﮵صѹADȡѡ0رգ1
+#define USE_WDT 0 //Źѡ0رգ1
+#define USE_EXFALSE 0 //ⲿFALSE洢ѡ0رգ1
+#define USE_RTC 1 //RTCʱӿأ0رգ1
+#define USE_LPTIM0 0 //LPTIM0أ0رգ1
+#define USE_DMA 0 //DMAأ0رգ1
+#define USE_RS485 0 //RS485أ0رգ1
+#define USE_I2C1 0 //I2C1أ0رգ1
+#define USE_SPI1 0 //SPI1أ0رգ1
+#define USE_SPI3 0 //SPI3أ0رգ1
-#define DEBUG 1
-#define RS485 1
+#define USE_BOOTLOADER 0 //BOOTLOADERأ0رգ1
-#define DBGUART_IRQn Int006_IRQn
-#define DBGUART_EI_IRQn Int007_IRQn
-#define DBG_RXPIN_IRQn Int002_IRQn
+#define USE_CS1237_LEFTUP 1 //CS1237أ0رգ1
+#define USE_CS1237_LEFTLOW 1 //CS1237أ0رգ1
+#define USE_CS1237_RIGHTUP 1 //CS1237أ0رգ1
+#define USE_CS1237_RIGHRLOW 1 //CS1237أ0رգ1
-#define RS485UART_IRQn Int008_IRQn
-#define RS485UART_EI_IRQn Int009_IRQn
-#define RS485_RXPIN_IRQn Int005_IRQn
+//<<---------------------------- MCU -------------------------------->>
+//< DEBUG
+#if(USE_DEBUG == 1)
+#define DBG_USART_CH (M4_USART1)
+#define DBG_USART_RX_PORT (PortA)
+#define DBG_USART_RX_PIN (Pin11)
+#define DBG_USART_TX_PORT (PortA)
+#define DBG_USART_TX_PIN (Pin12)
+#define DBG_USART_RX_FUNC (Func_Usart1_Rx)
+#define DBG_USART_TX_FUNC (Func_Usart1_Tx)
+#define DBG_USART_RI_NUM (INT_USART1_RI)
+#define DBG_USART_EI_NUM (INT_USART1_EI)
+#define DBG_USART_TI_NUM (INT_USART1_TI)
+#define DBG_USART_TCI_NUM (INT_USART1_TCI)
+#define DBG_FCG1_PERIPH (PWC_FCG1_PERIPH_USART1)
+#define DBG_RXPIN_EXIT_CH (ExtiCh13)
+#define DBG_RXPIN_EXIT_SRC (INT_PORT_EIRQ13)
+#endif
-
-
-#define RTC_IRQn Int001_IRQn
-
-//DEBUG
-#define DBG_USART_CH (M4_USART3)
-//#define DBG_USART_RX_PORT (PortA)
-//#define DBG_USART_RX_PIN (Pin15)
-//#define DBG_USART_TX_PORT (PortA)
-//#define DBG_USART_TX_PIN (Pin12)
-#define DBG_USART_RX_PORT (PortB)
-#define DBG_USART_RX_PIN (Pin09)
-#define DBG_USART_TX_PORT (PortB)
-#define DBG_USART_TX_PIN (Pin08)
-#define DBG_USART_RX_FUNC (Func_Usart3_Rx)
-#define DBG_USART_TX_FUNC (Func_Usart3_Tx)
-#define DBG_USART_RI_NUM (INT_USART3_RI)
-#define DBG_USART_EI_NUM (INT_USART3_EI)
-#define DBG_USART_TI_NUM (INT_USART3_TI)
-#define DBG_USART_TCI_NUM (INT_USART3_TCI)
-#define DBG_FCG1_PERIPH (PWC_FCG1_PERIPH_USART3)
-#define DBG_RXPIN_EXIT_CH (ExtiCh13)
-#define DBG_RXPIN_EXIT_SRC (INT_PORT_EIRQ13)
-
-
-//#define DBG_USART_CH (M4_USART1)
-//#define DBG_USART_RX_PORT (PortC)
-//#define DBG_USART_RX_PIN (Pin13)
-//#define DBG_USART_TX_PORT (PortH)
-//#define DBG_USART_TX_PIN (Pin02)
-//#define DBG_USART_RX_FUNC (Func_Usart1_Rx)
-//#define DBG_USART_TX_FUNC (Func_Usart1_Tx)
-//#define DBG_USART_RI_NUM (INT_USART1_RI)
-//#define DBG_USART_EI_NUM (INT_USART1_EI)
-//#define DBG_USART_TI_NUM (INT_USART1_TI)
-//#define DBG_USART_TCI_NUM (INT_USART1_TCI)
-//#define DBG_FCG1_PERIPH (PWC_FCG1_PERIPH_USART1)
-//#define DBG_RXPIN_EXIT_CH (ExtiCh13)
-//#define DBG_RXPIN_EXIT_SRC (INT_PORT_EIRQ13)
-
-
-
-//RS485
-#define RS485_USART_CH (M4_USART1)
-//#define RS485_USART_RX_PORT (PortB)
-//#define RS485_USART_RX_PIN (Pin08)
-//#define RS485_USART_TX_PORT (PortB)
-//#define RS485_USART_TX_PIN (Pin09)
-#define RS485_USART_RX_PORT (PortA)
-#define RS485_USART_RX_PIN (Pin15)
-#define RS485_USART_TX_PORT (PortA)
-#define RS485_USART_TX_PIN (Pin12)
-#define RS485_USART_RX_FUNC (Func_Usart1_Rx)
-#define RS485_USART_TX_FUNC (Func_Usart1_Tx)
-#define RS485_USART_RI_NUM (INT_USART1_RI)
-#define RS485_USART_EI_NUM (INT_USART1_EI)
-#define RS485_USART_TI_NUM (INT_USART1_TI)
-#define RS485_USART_TCI_NUM (INT_USART1_TCI)
-#define RS485_FCG1_PERIPH (PWC_FCG1_PERIPH_USART1)
-#define RS485_RXPIN_EXIT_CH (ExtiCh14)
-#define RS485_RXPIN_EXIT_SRC (INT_PORT_EIRQ14)
-
-#define RS485_CTRL_PORT (PortC)
-#define RS485_CTRL_PIN (Pin13)
-#define RS485_TX() PORT_SetBits(RS485_CTRL_PORT, RS485_CTRL_PIN)
-#define RS485_RX() PORT_ResetBits(RS485_CTRL_PORT, RS485_CTRL_PIN)
-
-
-
-/* LED */
-#define LED_Blue_PORT (PortH)
-#define LED_Blue_PIN (Pin02)
-
-#define LED_Green_PORT (PortB)
-#define LED_Green_PIN (Pin01)
-
-
-/* SPI_SCK Port/Pin definition */
-#define SPI_SCK_PORT (PortA)
-#define SPI_SCK_PIN (Pin05)
-#define SPI_SCK_FUNC (Func_Spi1_Sck)
-
-/* SPI_MOSI Port/Pin definition */
-#define SPI_MOSI_PORT (PortA)
-#define SPI_MOSI_PIN (Pin04)
-#define SPI_MOSI_FUNC (Func_Spi1_Mosi)
-
-/* SPI_MISO Port/Pin definition */
-#define SPI_MISO_PORT (PortA)
-#define SPI_MISO_PIN (Pin02)
-#define SPI_MISO_FUNC (Func_Spi1_Miso)
-
-/* SPI_MOSI Port/Pin definition */
-#define SPI_NSS_PORT (PortA)
-#define SPI_NSS_PIN (Pin03)
-#define SPI_NSS_FUNC (Func_Spi1_Nss0)
-#define SPI_NSS_SET() PORT_SetBits(SPI_NSS_PORT, SPI_NSS_PIN)
-#define SPI_NSS_CLR() PORT_ResetBits(SPI_NSS_PORT, SPI_NSS_PIN)
-
-/* SPI unit and clock definition */
-#define SPI_UNIT (M4_SPI1)
-#define SPI_UNIT_CLOCK (PWC_FCG1_PERIPH_SPI1)
-
-//SPI3
+// SPI3
+#if(USE_SPI3 == 1)
/* SPI3_SCK Port/Pin definition */
#define SPI3_SCK_PORT (PortB)
#define SPI3_SCK_PIN (Pin14)
@@ -151,37 +75,90 @@
/* SPI3 unit and clock definition */
#define SPI3_UNIT (M4_SPI3)
#define SPI3_UNIT_CLOCK (PWC_FCG1_PERIPH_SPI3)
+#endif
+// RS485
+#if(USE_RS485 == 1)
+#define RS485_USART_CH (M4_USART1)
+//#define RS485_USART_RX_PORT (PortB)
+//#define RS485_USART_RX_PIN (Pin08)
+//#define RS485_USART_TX_PORT (PortB)
+//#define RS485_USART_TX_PIN (Pin09)
+#define RS485_USART_RX_PORT (PortA)
+#define RS485_USART_RX_PIN (Pin15)
+#define RS485_USART_TX_PORT (PortA)
+#define RS485_USART_TX_PIN (Pin12)
+#define RS485_USART_RX_FUNC (Func_Usart1_Rx)
+#define RS485_USART_TX_FUNC (Func_Usart1_Tx)
+#define RS485_USART_RI_NUM (INT_USART1_RI)
+#define RS485_USART_EI_NUM (INT_USART1_EI)
+#define RS485_USART_TI_NUM (INT_USART1_TI)
+#define RS485_USART_TCI_NUM (INT_USART1_TCI)
+#define RS485_FCG1_PERIPH (PWC_FCG1_PERIPH_USART1)
+#define RS485_RXPIN_EXIT_CH (ExtiCh14)
+#define RS485_RXPIN_EXIT_SRC (INT_PORT_EIRQ14)
+#define RS485_CTRL_PORT (PortC)
+#define RS485_CTRL_PIN (Pin13)
+#define RS485_TX() PORT_SetBits(RS485_CTRL_PORT, RS485_CTRL_PIN)
+#define RS485_RX() PORT_ResetBits(RS485_CTRL_PORT, RS485_CTRL_PIN)
+#endif
+//< RTC
+#if(USE_RTC == 1)
+#define RTC_IRQn Int001_IRQn
+#endif
+//<<----------------------------- CS1237 ------------------------------->>
+//< LEFTUP CS1237
+#if(USE_CS1237_LEFTUP == 1)
+#define LEFTUP_CS1237_DOUT_PORTx (PortB)
+#define LEFTUP_CS1237_DOUT_PINx (Pin00)
+#define SET_LEFTUP_CS1237_DOUT() PORT_SetBits(LEFTUP_CS1237_DOUT_PORTx, LEFTUP_CS1237_DOUT_PINx)//
+#define CLR_LEFTUP_CS1237_DOUT() PORT_ResetBits(LEFTUP_CS1237_DOUT_PORTx, LEFTUP_CS1237_DOUT_PINx)//
+#define GET_LEFTUP_CS1237_DOUT() Gpio_GetInputIO(LEFTUP_CS1237_DOUT_PORTx, LEFTUP_CS1237_DOUT_PINx)
-/* SDIOC Port/Pin definition */
-#define SDIOC_CD_PORT (PortA)
-#define SDIOC_CD_PIN (Pin10)
+#define LEFTUP_CS1237_SCLK_PORTx (PortB)
+#define LEFTUP_CS1237_SCLK_PINx (Pin01)
+#define SET_LEFTUP_CS1237_SCLK() PORT_SetBits(LEFTUP_CS1237_SCLK_PORTx, LEFTUP_CS1237_SCLK_PINx)//
+#define CLR_LEFTUP_CS1237_SCLK() PORT_ResetBits(LEFTUP_CS1237_SCLK_PORTx, LEFTUP_CS1237_SCLK_PINx)//
+#endif
+//< LEFTLOW CS1237
+#if(USE_CS1237_LEFTLOW == 1)
+#define LEFTLOW_CS1237_DOUT_PORTx (PortB)
+#define LEFTLOW_CS1237_DOUT_PINx (Pin02)
+#define SET_LEFTLOW_CS1237_DOUT() PORT_SetBits(LEFTLOW_CS1237_DOUT_PORTx, LEFTLOW_CS1237_DOUT_PINx)//
+#define CLR_LEFTLOW_CS1237_DOUT() PORT_ResetBits(LEFTLOW_CS1237_DOUT_PORTx, LEFTLOW_CS1237_DOUT_PINx)//
+#define GET_LEFTLOW_CS1237_DOUT() Gpio_GetInputIO(LEFTLOW_CS1237_DOUT_PORTx, LEFTLOW_CS1237_DOUT_PINx)
-#define SDIOC_CK_PORT (PortB)
-#define SDIOC_CK_PIN (Pin15)
+#define LEFTLOW_CS1237_SCLK_PORTx (PortB)
+#define LEFTLOW_CS1237_SCLK_PINx (Pin10)
+#define SET_LEFTLOW_CS1237_SCLK() PORT_SetBits(LEFTLOW_CS1237_SCLK_PORTx, LEFTLOW_CS1237_SCLK_PINx)//
+#define CLR_LEFTLOW_CS1237_SCLK() PORT_ResetBits(LEFTLOW_CS1237_SCLK_PORTx, LEFTLOW_CS1237_SCLK_PINx)//
+#endif
+//< RIGHTUP CS1237
+#if(USE_CS1237_RIGHTUP == 1)
+#define RIGHTUP_CS1237_DOUT_PORTx (PortA)
+#define RIGHTUP_CS1237_DOUT_PINx (Pin06)
+#define SET_RIGHTUP_CS1237_DOUT() PORT_SetBits(RIGHTUP_CS1237_DOUT_PORTx, RIGHTUP_CS1237_DOUT_PINx)//
+#define CLR_RIGHTUP_CS1237_DOUT() PORT_ResetBits(RIGHTUP_CS1237_DOUT_PORTx, RIGHTUP_CS1237_DOUT_PINx)//
+#define GET_RIGHTUP_CS1237_DOUT() Gpio_GetInputIO(RIGHTUP_CS1237_DOUT_PORTx, RIGHTUP_CS1237_DOUT_PINx)
-#define SDIOC_CMD_PORT (PortA)
-#define SDIOC_CMD_PIN (Pin06)
-
-#define SDIOC_D0_PORT (PortB)
-#define SDIOC_D0_PIN (Pin04)
-
-#define SDIOC_D1_PORT (PortA)
-#define SDIOC_D1_PIN (Pin08)
-
-#define SDIOC_D2_PORT (PortA)
-#define SDIOC_D2_PIN (Pin09)
-
-#define SDIOC_D3_PORT (PortB)
-#define SDIOC_D3_PIN (Pin05)
-
-/* SD sector && count */
-#define SD_SECTOR_START (0u)
-#define SD_SECTOR_COUNT (4u)
-
-/* SDIOC unit */
-#define SDIOC_UNIT (M4_SDIOC1)
+#define RIGHTUP_CS1237_SCLK_PORTx (PortA)
+#define RIGHTUP_CS1237_SCLK_PINx (Pin07)
+#define SET_RIGHTUP_CS1237_SCLK() PORT_SetBits(RIGHTUP_CS1237_SCLK_PORTx, RIGHTUP_CS1237_SCLK_PINx)//
+#define CLR_RIGHTUP_CS1237_SCLK() PORT_ResetBits(RIGHTUP_CS1237_SCLK_PORTx, RIGHTUP_CS1237_SCLK_PINx)//
+#endif
+//< RIGHRLOW CS1237
+#if(USE_CS1237_RIGHRLOW == 1)
+#define RIGHRLOW_CS1237_DOUT_PORTx (PortA)
+#define RIGHRLOW_CS1237_DOUT_PINx (Pin04)
+#define SET_RIGHRLOW_CS1237_DOUT() PORT_SetBits(RIGHRLOW_CS1237_DOUT_PORTx, RIGHRLOW_CS1237_DOUT_PINx)//
+#define CLR_RIGHRLOW_CS1237_DOUT() PORT_ResetBits(RIGHRLOW_CS1237_DOUT_PORTx, RIGHRLOW_CS1237_DOUT_PINx)//
+#define GET_RIGHRLOW_CS1237_DOUT() Gpio_GetInputIO(RIGHRLOW_CS1237_DOUT_PORTx, RIGHRLOW_CS1237_DOUT_PINx)
+#define RIGHRLOW_CS1237_SCLK_PORTx (PortA)
+#define RIGHRLOW_CS1237_SCLK_PINx (Pin05)
+#define SET_RIGHRLOW_CS1237_SCLK() PORT_SetBits(RIGHRLOW_CS1237_SCLK_PORTx, RIGHRLOW_CS1237_SCLK_PINx)//
+#define CLR_RIGHRLOW_CS1237_SCLK() PORT_ResetBits(RIGHRLOW_CS1237_SCLK_PORTx, RIGHRLOW_CS1237_SCLK_PINx)//
+#endif
void BSP_Init(void);
diff --git a/Project/HC32F460/source/User/Src/Algorithm.c b/Project/HC32F460/source/User/Src/Algorithm.c
new file mode 100644
index 0000000..9c4a583
--- /dev/null
+++ b/Project/HC32F460/source/User/Src/Algorithm.c
@@ -0,0 +1,751 @@
+#include "bsp.h"
+#include "Algorithm.h"
+#include "Debug.h"
+
+/*****************************************************************************************
+* : check_peaks_valleys_ratio
+* : ݵķֵǷ0ֵǷС00ֵ
+* : data,
+ length, ݳ
+* ֵ: طֵֵṹ
+*****************************************************************************************/
+PeakValleyCheck check_peaks_valleys(int data[], int length) {
+ PeakValleyCheck result = {true, true, 0, 0};
+
+ // ݳС3γЧķֵ/ֵ
+ if (length < 3) {
+ return result;
+ }
+
+ int i = 0;
+ // ͷ0ֵ
+ while (i < length && data[i] == 0) {
+ i++;
+ }
+
+ // ݵ
+ while (i < length) {
+ // 1. ѰһΪ
+ int start = i;
+ while (i < length && data[i] == 0) {
+ i++;
+ }
+ if (i >= length) break;
+
+ // 2. ѰҵǰεĽ
+ int end = i;
+ while (end < length && data[end] != 0) {
+ end++;
+ }
+ end--; // ָһ
+
+ // 3. ڵǰмֵֵ
+ for (int j = i; j <= end; j++) {
+ // ߽
+ if (j == i || j == end) continue;
+
+ // ǷΪֵڵķ㣩
+ if (data[j] > data[j-1] && data[j] > data[j+1]) {
+ result.peak_count++;
+ if (data[j] <= 0) {
+ result.peaks_positive = false;
+ }
+ }
+
+ // ǷΪֵСڵķ㣩
+ if (data[j] < data[j-1] && data[j] < data[j+1]) {
+ result.valley_count++;
+ if (data[j] >= 0) {
+ result.valleys_negative = false;
+ }
+ }
+ }
+
+ // ƶһ
+ i = end + 1;
+ }
+
+ return result;
+}
+/*****************************************************************************************
+* : analyze_trend
+* : Ʒ
+* : data,
+ length, ݳ
+* ֵ: Ʒṹ
+*****************************************************************************************/
+TrendResult analyze_trend(int data[], int length) {
+ TrendResult result = {0};
+ #if 1
+ // 0. Чݳ
+ if (length < 2) {
+ DBG_LOG("Data deficient\r\n");
+ return result;
+ }
+
+ // 1. Իعб
+ double sum_x = 0, sum_y = 0, sum_xy = 0, sum_x2 = 0;
+
+ for (int i = 0; i < length; i++) {
+ double x = i; // ʱ (0,1,2,...)
+ double y = data[i];
+ sum_x += x;
+ sum_y += y;
+ sum_xy += x * y;
+ sum_x2 += x * x;
+ }
+
+ double numerator = length * sum_xy - sum_x * sum_y;
+ double denominator = length * sum_x2 - sum_x * sum_x;
+
+ // ĸΪ
+ if (fabs(denominator) > 1e-10) {
+ result.slope = numerator / denominator;
+ }
+ #endif
+ #if 0
+ // 2. ַű仯
+ int sign_changes = 0;
+ int prev_sign = 0; // 0=δʼ, 1=, -1=
+
+ for (int i = 1; i < length; i++) {
+ int diff = data[i] - data[i-1];
+ int curr_sign = (diff > 0) ? 1 : (diff < 0) ? -1 : 0;
+
+ if (curr_sign != 0) {
+ if (prev_sign != 0 && curr_sign != prev_sign) {
+ sign_changes++;
+ }
+ prev_sign = curr_sign;
+ }
+ }
+ result.sign_changes = sign_changes;
+ #endif
+ #if 0
+ // 3. ֵ̬ݳȣ
+ int oscillation_threshold = (int)(0.4 * (length - 1)); // 40%ı仯
+ double slope_threshold = 0.05 * (length / 20.0); // ȱ
+ #endif
+ #if 0
+ // 4. ж
+ if (sign_changes >= oscillation_threshold) {
+ //DBG_LOG("Oscillating trend\r\n");//
+ result.trend_type = 0;
+ } else if (fabs(result.slope) < slope_threshold) {
+ //DBG_LOG("Smooth trend\r\n");//ƽ
+ result.trend_type = 1;
+ } else if (result.slope > 0) {
+ //DBG_LOG("Up trend\r\n");//
+ result.trend_type = 2;
+ } else {
+ //DBG_LOG("Down trend\r\n");//½
+ result.trend_type = 3;
+ }
+ #endif
+ #if 0
+ // 5. ж
+ double abs_slope = fabs(result.slope);
+ if (abs_slope > 0.8) {
+ //DBG_LOG("Steeply");//
+ result.sign_changes = 0;
+ } else if (abs_slope > 0.3) {
+ //DBG_LOG("Obvious");//
+ result.sign_changes = 1;
+ } else if (abs_slope > 0.1) {
+ //DBG_LOG("Mild");//º
+ result.sign_changes = 2;
+ } else {
+ //DBG_LOG("gentle");//ƽ
+ result.sign_changes = 3;
+ }
+ #endif
+ return result;
+}
+/*****************************************************************************************
+* : calculateAverage
+* : ƽֵ
+* : arr,
+ size, ݳ
+* ֵ: long long
+*****************************************************************************************/
+float calculateAverage(int *arr, int size)
+{
+ int sum = 0;
+ for (int i = 0; i < size; i++) {
+ sum += arr[i]; // ۼеÿԪ
+ }
+ return (float)sum / size; // ƽֵ
+}
+/*****************************************************************************************
+* : slope
+* : б
+* : x_data, x
+ y_data, y
+* ֵ: long long
+*****************************************************************************************/
+double slope(int32_t *x_data, int32_t *y_data, int n)
+{
+ double sum_x = 0, sum_y = 0, sum_xx = 0, sum_xy = 0;
+ for (int i = 0; i < n; i++) {
+ sum_x += x_data[i];
+ sum_y += y_data[i];
+ sum_xx += pow(x_data[i] - calculateAverage(x_data, n), 2);
+ sum_xy += (x_data[i] - calculateAverage(x_data, n)) * (y_data[i] - calculateAverage(y_data, n));
+ }
+
+ return sum_xy / sum_xx;
+}
+/*****************************************************************************************
+* : power
+* : 㷨
+* : base, ˲
+ exponent, ˲ݳ
+* ֵ: long long
+*****************************************************************************************/
+long long power(int base, unsigned int exponent) {
+ long long result = 1;
+ while (exponent > 0) {
+ if (exponent % 2 == 1) {
+ result *= base; // ָΪʱ۳
+ }
+ base *= base; // ƽ
+ exponent /= 2; // ָ۰
+ }
+ return result;
+}
+/*****************************************************************************************
+* : IntFilter_16t
+* : 16λֵ˲
+* : Data, ˲
+ Cnt, ˲ݳ
+ FilterCnt, ˳ݳȣΪ2ı
+* ֵ: ˲16λ
+*****************************************************************************************/
+int IntFilter_16t(int16_t *Data, uint8_t Cnt, uint8_t FilterCnt)
+{
+ int32_t sum = 0;
+ int32_t temp;
+
+ if(Cnt < 2)
+ return *Data;
+
+ for(int j=0; j Data[i+1]) {
+ temp = Data[i];
+ Data[i] = Data[i+1];
+ Data[i+1] = temp;
+ }
+ }
+ }
+
+ for(int count = FilterCnt / 2; count < Cnt - FilterCnt / 2; count++)
+ sum += Data[count];
+ return (sum / (Cnt - FilterCnt));
+}
+
+/*****************************************************************************************
+* : IntFilter_32t
+* : 32λֵ˲
+* : Data, ˲
+ Cnt, ˲ݳ
+ FilterCnt, ˳ݳȣΪ2ı
+* ֵ: ˲32λ
+*****************************************************************************************/
+int IntFilter_32t(int32_t *Data, uint8_t Cnt, uint8_t FilterCnt)
+{
+ int32_t sum = 0;
+ int32_t temp;
+
+ if(Cnt < 2)
+ return *Data;
+
+ for(int j=0; j Data[i+1]) {
+ temp = Data[i];
+ Data[i] = Data[i+1];
+ Data[i+1] = temp;
+ }
+ }
+ }
+
+ for(int count = FilterCnt / 2; count < Cnt - FilterCnt / 2; count++)
+ sum += Data[count];
+ return (sum / (Cnt - FilterCnt));
+}
+/*****************************************************************************************
+* : IntFilter_u32t
+* : 32λλֵ˲
+* : Data, ˲
+ Cnt, ˲ݳ
+ FilterCnt, ˳ݳȣΪ2ı
+* ֵ: ˲32λ
+*****************************************************************************************/
+uint32_t IntFilter_u32t(uint32_t *Data, uint8_t Cnt, uint8_t FilterCnt)
+{
+ uint32_t sum = 0;
+ uint32_t temp;
+
+ if(Cnt < 2)
+ return *Data;
+
+ for(int j=0; j Data[i+1]) {
+ temp = Data[i];
+ Data[i] = Data[i+1];
+ Data[i+1] = temp;
+ }
+ }
+ }
+
+ for(int count = FilterCnt / 2; count < Cnt - FilterCnt / 2; count++)
+ sum += Data[count];
+ return (sum / (Cnt - FilterCnt));
+}
+/*****************************************************************************************
+* : IntFilter_Float
+* : 32λֵ˲
+* : Data, ˲
+ Cnt, ˲ݳ
+ FilterCnt, ˳ݳȣΪ2ı
+* ֵ: ˲32λ
+*****************************************************************************************/
+float IntFilter_Float(float *Data, uint8_t Cnt, uint8_t FilterCnt)
+{
+ float sum = 0;
+ float temp;
+
+ if(Cnt < 2)
+ return *Data;
+
+ for(int j=0; j Data[i+1]) {
+ temp = Data[i];
+ Data[i] = Data[i+1];
+ Data[i+1] = temp;
+ }
+ }
+ }
+
+ for(int count = FilterCnt / 2; count < Cnt - FilterCnt / 2; count++)
+ sum += Data[count];
+ return (sum / (Cnt - FilterCnt));
+}
+/*****************************************************************************************
+* : AverageFilter_u32t
+* : 32λݾֵ˲,ȥֵСֵ
+* : Data, ˲
+ Cnt, ˲ݳ
+* ֵ: ˲32λ
+*****************************************************************************************/
+uint32_t AverageFilter_u32t(uint32_t *Data, uint8_t Cnt)
+{
+ uint32_t sum = 0;
+ uint32_t temp;
+ uint32_t max = Data[0];
+ uint32_t min = Data[0];
+
+ if(Cnt == 0)
+ return 0;
+
+ if(Cnt == 1)
+ return Data[0];
+
+ if(Cnt == 2)
+ {
+ sum = Data[0] + Data[1];
+ return sum / 2;
+ }
+
+ for (uint8_t i = 0; i < Cnt; i++)//ҳֵ
+ {
+ if (Data[i] > max)
+ {
+ max = Data[i];
+ }
+ }
+
+ for (uint8_t i = 0; i < Cnt; i++)//ҳСֵ
+ {
+ if (Data[i] < min)
+ {
+ min = Data[i];
+ }
+ }
+
+ for(int i = 0; i < Cnt; i++){//
+ sum += Data[i];
+ }
+
+ return (sum - max - min) / (Cnt - 2);
+}
+
+/*****************************************************************************************
+* : AverageFilter_32t
+* : 32λݾֵ˲,ȥֵСֵ
+* : Data, ˲
+ Cnt, ˲ݳ
+* ֵ: ˲32λ
+*****************************************************************************************/
+int AverageFilter_32t(int32_t *Data, uint8_t Cnt)
+{
+ int32_t sum = 0;
+ int32_t max = Data[0];
+ int32_t min = Data[0];
+
+ if(Cnt == 0)
+ return 0;
+
+ if(Cnt == 1)
+ return Data[0];
+
+ if(Cnt == 2)
+ {
+ sum = Data[0] + Data[1];
+ return sum / 2;
+ }
+
+ for (uint8_t i = 0; i < Cnt; i++)//ҳֵ
+ {
+ if (Data[i] > max)
+ {
+ max = Data[i];
+ }
+ }
+
+ for (uint8_t i = 0; i < Cnt; i++)//ҳСֵ
+ {
+ if (Data[i] < min)
+ {
+ min = Data[i];
+ }
+ }
+
+ for(int i = 0; i < Cnt; i++){//
+ sum += Data[i];
+ }
+
+ return (sum - max - min) / (Cnt - 2);
+}
+/*****************************************************************************************
+* : Fitting_Polynomial
+* : AD[], Actual[]гһݣС˷,Ĭ3
+ ƽʽΪy = a3*x^3 + a2*x^2 + a1*x + a0;
+* : AD, ADоƬֵ
+ Actual, ʵʱУֵ
+ Cnt, ݸ
+* ֵ:
+*****************************************************************************************/
+void Fitting_Polynomial(double *AD, double *Actual, uint8_t Cnt)
+{
+ static const uint8_t rank_ = 3;//Ͻ3
+ double atemp[2 * (rank_ + 1)], b[rank_ + 1], a[rank_ + 1][rank_ + 1];
+ int i, j, k;
+
+ for(i = 0; i < Cnt; i++){
+ atemp[1] += AD[i];
+ atemp[2] += pow(AD[i], 2);
+ atemp[3] += pow(AD[i], 3);
+ atemp[4] += pow(AD[i], 4);
+ atemp[5] += pow(AD[i], 5);
+ atemp[6] += pow(AD[i], 6);
+ b[0] += Actual[i];
+ b[1] += AD[i] * Actual[i];
+ b[2] += pow(AD[i], 2) * Actual[i];
+ b[3] += pow(AD[i], 3) * Actual[i];
+ }
+
+ atemp[0] = Cnt;
+
+ for(i = 0; i < rank_ + 1; i++){ //Էϵb[]
+ k = i;
+ for(j = 0; j < rank_ + 1; j++) a[i][j] = atemp[k++];
+ }
+
+ //Ϊ˹ԪȥԷ
+ for(k = 0; k < rank_ + 1 - 1; k++){ //n - 1
+ int column = k;
+ double mainelement = a[k][k];
+
+ for(i = k; i < rank_ + 1; i++) //Ԫ
+ if(fabs(a[i][k]) > mainelement){
+ mainelement = fabs(a[i][k]);
+ column = i;
+ }
+ for(j = k; j < rank_ + 1; j++){ //
+ double atemp = a[k][j];
+ a[k][j] = a[column][j];
+ a[column][j] = atemp;
+ }
+ double btemp = b[k];
+ b[k] = b[column];
+ b[column] = btemp;
+
+ for(i = k + 1; i < rank_ + 1; i++){ //Ԫ
+ double Mik = a[i][k] / a[k][k];
+ for(j = k; j < rank_ + 1; j++) a[i][j] -= Mik * a[k][j];
+ b[i] -= Mik * b[k];
+ }
+ }
+
+ b[rank_ + 1 - 1] /= a[rank_ + 1 - 1][rank_ + 1 - 1]; //ش
+ for(i = rank_ + 1 - 2; i >= 0; i--){
+ double sum = 0;
+ for(j = i + 1; j < rank_ + 1; j++) sum += a[i][j] * b[j];
+ b[i] = (b[i] - sum) / a[i][i];
+ }//˹Ԫȥ
+
+ DBG_LOG("P(x) = %.16fx^3%+.16fx^2%+.16fx%+.16f\r\n", b[3], b[2], b[1], b[0]);
+
+// App.Para.Cali.FitCoef[0] = b[0];
+// App.Para.Cali.FitCoef[1] = b[1];
+// App.Para.Cali.FitCoef[2] = b[2];
+// App.Para.Cali.FitCoef[3] = b[3];
+
+}
+/*****************************************************************************************
+* : get_K
+* : бʼ
+* : countݸ ()ĸ Ŀ
+ dataCol_X[count]ݵ
+ dataRow_Y[count]ݵ
+* ֵ: k б
+*****************************************************************************************/
+float get_K(uint8_t count , int32_t *dataCol_X, int32_t *dataRow_Y)
+{
+ float k = 0;//б
+ float aveCol_X = 0;//еƽֵx
+ float aveRow_Y = 0;//еƽֵy
+ int32_t sum_XY = 0;//еܺxy
+ int32_t sumRow_Y = 0;//еܺy
+ int32_t sumCol_X = 0;//еܺx
+ int32_t sumCol_X2 = 0;//еܺx^2
+
+ for(uint16_t i = 0 ; i < count ; i++)
+ {
+ sumCol_X += dataCol_X[i];//xܺ
+ sumRow_Y += dataRow_Y[i];//yܺ
+ sumCol_X2 += dataCol_X[i] * dataCol_X[i];//x^2ܺ
+ sum_XY += (dataCol_X[i] * dataRow_Y[i]);//xyܺ
+ }
+
+ aveCol_X = 1.0 * sumCol_X / count;//ƽֵ
+ aveRow_Y = 1.0 * sumRow_Y / count;
+
+ k = (sum_XY - aveCol_X * aveRow_Y * count) / //ݹʽб
+ (sumCol_X2 - aveCol_X * aveCol_X * count);
+
+ return k;
+}
+/*****************************************************************************************
+* : TrendAnalyse
+* : жеֵ
+* : Data,
+ Cnt,
+ VPT,
+* ֵ: truefalse
+*****************************************************************************************/
+int8_t TrendAnalyse(int32_t *Data, uint8_t Cnt, int32_t VPT)
+{
+ int8_t zero = 0,plus = 0, minus = 0, Trend = 0xEE;
+
+ if(Cnt < 2)
+ return Trend;
+
+ for(uint8_t i = 1; i < Cnt; i++)
+ {
+ if((Data[i] - Data[i - 1]) <= VPT && ((Data[i] - Data[i - 1]) >= (-VPT)))
+ {
+ zero++;
+ }
+ else if((Data[i] - Data[i - 1]) > VPT)
+ {
+ plus++;
+ }
+ else if((Data[i] - Data[i - 1]) < VPT)
+ {
+ minus++;
+ }
+ }
+ if(zero > (Cnt-(Cnt / 5)))
+ Trend = 0;//
+ else if(plus > (Cnt-(Cnt/ 5)))
+ Trend = 1;//
+ else if(minus > (Cnt-(Cnt/ 5)))
+ Trend = -1;//½
+
+ return Trend;//
+}
+/*****************************************************************************************
+* : Waveform_Up
+* : ҳһβεIJֵ
+ dCnt, ݳ
+ pCnt, ҪҲ
+ vlue, صIJֵ
+* ֵ: truefalse
+*****************************************************************************************/
+void Waveform_Up(int32_t *Data, uint8_t dCnt, uint8_t pCnt, int32_t *vlue)
+{
+ uint8_t peak[pCnt];
+ for(uint8_t i = 0, j = 0; i < dCnt; i++)//ҳֵַ
+ {
+ if(Data[i] < Data[i + 1] && Data[i + 1] > Data[i + 2])
+ {
+ peak[j++] = i;
+ }
+ if(j == pCnt)
+ break;
+ }
+ for(uint8_t i = 0; i < pCnt; i++)
+ {
+ vlue[i] = Data[peak[i]];
+ }
+}
+/*****************************************************************************************
+* : Waveform_Down
+* : ҳһβεIJֵ
+ dCnt, ݳ
+ pCnt, ҪҲ
+ vlue, صIJֵ
+* ֵ: truefalse
+*****************************************************************************************/
+void Waveform_Down(int32_t *Data, uint8_t dCnt, uint8_t pCnt, int32_t *vlue)
+{
+ uint8_t peak[pCnt];
+ for(uint8_t i = 0, j = 0; i < dCnt; i++)//ҳֵַ
+ {
+ if(Data[i] > Data[i + 1] && Data[i + 1] < Data[i + 2])
+ {
+ peak[j++] = i;
+ }
+ if(j == pCnt)
+ break;
+ }
+ for(uint8_t i = 0; i < pCnt; i++)
+ {
+ vlue[i] = Data[peak[i]];
+ }
+}
+/*****************************************************************************************
+* : count_most_greater
+* : жеֵǷִ target
+* : arr,
+ size,
+ target,
+* ֵ: truefalse
+*****************************************************************************************/
+bool count_most_greater(int32_t *arr, uint8_t size, int32_t target)
+{
+ uint8_t cnt = 0;
+ for (int i = 0; i < size; i++) {
+ if (arr[i] < target)
+ cnt++;
+ if(cnt > (size - (size / 5)))
+ return false;
+ }
+ return true;
+}
+/*****************************************************************************************
+* : count_greater
+* : жеֵǷȫ target
+* : arr,
+ size,
+ target,
+* ֵ: truefalse
+*****************************************************************************************/
+bool count_greater(int32_t *arr, uint8_t size, int32_t target)
+{
+ for (int i = 0; i < size; i++) {
+ if (arr[i] < target)
+ return false;
+ }
+ return true;
+}
+/*****************************************************************************************
+* : count_smaller
+* : жеֵǷȫС target
+* : arr,
+ size,
+ target,
+* ֵ: truefalse
+*****************************************************************************************/
+bool count_smaller(int32_t *arr, uint8_t size, int32_t target)
+{
+ for (int i = 0; i < size; i++) {
+ if (arr[i] > target)
+ return false;
+ }
+ return true;
+}
+
+/*****************************************************************************************
+* : CRC_Modbus
+* : CRC16㺯
+* : wBase, ʽ
+ ParaУ
+ Data, Уݳ
+* ֵ: crc16Уֵ
+*****************************************************************************************/
+uint16_t CRC_Modbus(uint16_t wBase, uint8_t *para, uint16_t length)
+{
+ uint16_t crc = 0xffff;
+
+ uint16_t index,i;
+
+ for(index = 0 ; index < length;index++) {
+ crc ^= para[index];
+ for(i = 0; i < 8; i++) {
+ if(crc & 1) {
+ crc >>= 1;
+ crc ^= wBase;
+ }
+ else
+ crc >>= 1;
+ }
+ }
+ return crc;
+}
+
+/*****************************************************************************************
+* : CRC_Sum
+* : ӵڶֽڿʼȡ
+* : _pbuffУ
+ _cmdLenУݳ
+* ֵ: cmd_sumУֵ(һֽ)
+*****************************************************************************************/
+uint8_t CRC_Sum(uint8_t *_pbuff, uint16_t _cmdLen)
+{
+ uint8_t cmd_sum=0;
+ uint16_t i;
+
+ for(i=1;i<_cmdLen;i++)//1ʼһֽ
+ {
+ cmd_sum += _pbuff[i];
+ }
+ cmd_sum = (~cmd_sum);
+
+ return cmd_sum;
+}
+/*****************************************************************************************
+* : isAllZero
+* : жһֵǷȫΪ0
+* : arr
+ size
+* ֵ: truefalse
+*****************************************************************************************/
+bool isAllZero(uint8_t *arr, int size)
+{
+ for (int i = 0; i < size; i++) {
+ if (arr[i] != 0) {
+ return false; // һԪزΪ0false
+ }
+ }
+ return true; // ԪضΪ0true
+}
+
+
+
+
diff --git a/Project/HC32F460/source/User/Src/Debug.c b/Project/HC32F460/source/User/Src/Debug.c
new file mode 100644
index 0000000..c001e4c
--- /dev/null
+++ b/Project/HC32F460/source/User/Src/Debug.c
@@ -0,0 +1,279 @@
+#include
+#include
+#include
+#include
+#include
+
+#include "Debug.h"
+#include "main.h"
+#include "bsp.h"
+
+#if (USE_DEBUG != 0)
+#define DEBUG_CMD_CNT 8
+const DBGFunType DebugFun[DEBUG_CMD_CNT];
+
+static char buff[BUFSIZE];
+volatile uint16_t iw=0; /* buffer write index*/
+static uint16_t ir=0; /* buffer read index*/
+static uint16_t DebugRxTimeOut1mSCnt;
+static char RxBuff[128];
+static uint8_t RxLen = 0;
+
+void vcom_Print(uint8_t sLen);
+
+void vcom_Send( char *format, ... )
+{
+ va_list args;
+ va_start(args, format);
+ uint8_t len;
+ char tempBuff[DEBUG_BUFF_SIZE_MAX];
+ //uint32_t primask_bit;
+ uint8_t offset = 0;
+ //primask_bit = __get_PRIMASK();
+ //__disable_irq();
+
+ /*convert into string at buff[0] of length iw*/
+ len = vsprintf(&tempBuff[0], format, args);
+
+ while(offset < len) {
+ if((len - offset) < BUFSIZE) {
+ memcpy(&buff[0], &tempBuff[offset], len - offset);
+ vcom_Print(len - offset);
+ offset = len;
+ }
+ else {
+ memcpy(&buff[0], &tempBuff[offset], BUFSIZE);
+ offset += BUFSIZE;
+ vcom_Print(BUFSIZE);
+ }
+ }
+
+ //__set_PRIMASK(primask_bit);
+ //__enable_irq();
+
+ va_end(args);
+}
+
+// һvcom_Printڴӡַ
+void vcom_Print(uint8_t sLen)
+{
+ // һַָCurChar
+ char* CurChar;
+ // ʼir
+ ir = 0;
+ // irСsLenʱѭִ
+ while(ir < sLen)
+ {
+ // ȡַָCurChar
+ CurChar = &buff[ir++];
+ // DebugUartSendCurCharַָΪ1
+ DebugUartSend((uint8_t*)CurChar, 1);
+ }
+}
+
+// һvcom_Send2ڷַ
+void vcom_Send2(uint8_t *sData, uint16_t len)
+{
+ // sDataÿԪط͵DebugUartSend
+ for(int i = 0; i < len; i++) {
+ DebugUartSend(&sData[i], 1);
+ }
+}
+
+void DebugLoopHandler(void)
+{
+ int argc = 0;
+ char *argv[10], *argp;
+
+ if(DebugRxTimeOut1mSCnt > 0 || RxLen == 0)
+ return;
+
+ //for(argv[argc] = strtok(RxBuff, " "); argv[argc] != NULL; argv[++argc] = strtok(NULL, " "));
+ // ַargv
+ argp = strtok(RxBuff, " ");
+ for(int i = 0; i < 10; i++) {
+ if(argp != NULL) {
+ argv[argc++] = argp;
+ argp = strtok(NULL, " ");
+ }
+ else if(argc > 0){
+ argc--;
+ break;
+ }
+ }
+
+ // ȡһ丳ֵargp
+ argp = strtok(argv[argc], "'\r'");
+ // argpΪգargpֵֵargv[argc]argc1
+ if(argp != NULL) {
+ argv[argc++] = argp;
+ }
+ // RxLenΪ0
+ else {
+ RxLen = 0;
+ return;
+ }
+
+ // DebugFun飬argv[0]ǷDBGCmdƥ䣬ƥDBGExec
+ for(int i = 0; i < DEBUG_CMD_CNT; i++) {
+ if(strcmp(argv[0], DebugFun[i].DBGCmd) == 0)
+ DebugFun[i].DBGExec(argc, argv);
+ }
+
+ memset(RxBuff, 0x00, 128);
+ RxLen = 0;
+}
+
+
+
+uint32_t RxTimeCurrent;
+uint32_t RxTimeLast = 0;
+
+// Dbg1msRoutine
+// ܣ1msʱroutine
+void Dbg1msRoutine(void)
+{
+ // 1msʱӼ0
+ if(DebugRxTimeOut1mSCnt > 0)
+ // 1msʱӼ1
+ DebugRxTimeOut1mSCnt--;
+}
+
+// 庯DbgUsartRxIrqCallbackڴڽж
+void DbgUsartRxIrqCallback(void)
+{
+ // 1ӳʱΪ0RxLen
+ if(DebugRxTimeOut1mSCnt == 0)
+ RxLen = 0;
+
+ // 1ӳʱ
+ DebugRxTimeOut1mSCnt = 3;
+ // ȡڽյ
+ uint8_t Data = DbgUartRec();
+ // RxLenС128ӵRxBuff
+ if(RxLen < 128) {
+ RxBuff[RxLen++] = Data;
+ }
+// DBG_LOG("RxBuff = %s\n", RxBuff);
+// RS485_Flag=1;//ձ־Ϊ1
+}
+
+void DebugTest(int argc, char *argv[])
+{
+ // С2
+ if(argc < 2)
+ return;
+ // Ϊ?ӡϢ
+ if(strcmp(argv[1], "?") == 0)
+ {
+ DBG_LOG("Debug Cmd:\r\n\
+ disp task on/off -->Open the task display.\r\n");
+ return;
+ }
+ // ΪonӡTest ON
+ if(strcmp(argv[1], "on") == 0)
+ {
+// TestOn();
+ DBG_LOG("Test ON\r\n");
+ }
+ // ΪoffӡTest OFF
+ else if(strcmp(argv[1], "off") == 0)
+ {
+// TestOFF();
+ DBG_LOG("Test OFF\r\n");
+ }
+}
+
+
+
+#if 0
+void DebugCmdGps(int argc, char *argv[])
+{
+ if(argc < 2)
+ return;
+
+ if(strcmp(argv[1], "?") == 0) {
+ DBG_LOG("Debug Cmd:\r\n\
+ gps on/off -->Turn the gps on or off.\r\n");
+ return;
+ }
+
+ if(strcmp(argv[1], "on") == 0) {
+ GPSStart();
+ }
+ else if(strcmp(argv[1], "off") == 0) {
+ GPSStop();
+ }
+}
+#endif
+
+
+void DebugCmdHelp(int argc, char *argv[])
+{
+ DBG_LOG("Debug Cmd:\r\n\
+ disp task on/off -->Open the task display.\r\n\
+ help\
+ ");
+}
+
+
+//// һκDebugReadDataڶȡ
+//void DebugReadData(int argc, char *argv[])
+//{
+// // һ32λADReadStartʼֵΪ0
+// uint32_t ADReadStart = 0;
+// // һADData_t͵ADBuffСΪ640
+// ADData_t ADBuff[640];
+//
+// // ADReadStartСSDCARD_BLOCK_MAXʱѭִ
+// while(ADReadStart < SDCARD_BLOCK_MAX) {
+// // ʹSDCardReadBlocksȡݣADReadStartʼȡ10飬ݴ洢ADBuff
+// SDCardReadBlocks(ADReadStart, 10, (uint8_t *)ADBuff);
+// // ADBuff飬ÿԪشӡ
+// for(int i = 0; i < 640; i++) {
+// DBG_LOG("%d\t%d\t%d\t%d\r\n", ADBuff[i].AD0, ADBuff[i].AD1, ADBuff[i].AD2, ADBuff[i].AD3);
+// }
+// // ADReadStart10
+// ADReadStart += 10;
+// }
+//}
+
+
+
+//// һSetTimeΪint argcchar *argv[]
+//void SetTime(int argc, char *argv[])
+//{
+// // һַtestʼΪ0
+// char test[10] = 0;
+// // һnumʼΪ0
+// int num = 0;
+// // argcС2
+// if(argc < 2)
+// return;
+// // argv[1]"?"ӡʾϢ
+// if(strcmp(argv[1], "?") == 0)
+// {
+// DBG_LOG("SetTime Cmd:\r\n\
+// disp task on/off -->Open the task display.\r\n");
+// return;
+// }
+// // argv[1]ֵƵtest
+// memcpy(test, (char *)argv[1], 10);
+// // testתΪ
+// num = atoi(test);
+// // TimeSyncnumΪ
+// TimeSync(num);
+//}
+
+
+
+
+const DBGFunType DebugFun[DEBUG_CMD_CNT] = {
+ "help", DebugCmdHelp,
+// "TimeSync", (void*)TimeSync,
+// "SetTime", SetTime,
+};
+
+#endif
+
+
diff --git a/Project/HC32F460/source/User/Src/Encryption.c b/Project/HC32F460/source/User/Src/Encryption.c
index daca8b5..842f41a 100644
--- a/Project/HC32F460/source/User/Src/Encryption.c
+++ b/Project/HC32F460/source/User/Src/Encryption.c
@@ -1,4 +1,4 @@
-#include "encryption.h"
+#include "Encryption.h"
//ӻܱ
const unsigned char EPT_Table[32][6] = {
diff --git a/Project/HC32F460/source/User/Src/bsp.c b/Project/HC32F460/source/User/Src/bsp.c
index ceb10bb..e2dcc3b 100644
--- a/Project/HC32F460/source/User/Src/bsp.c
+++ b/Project/HC32F460/source/User/Src/bsp.c
@@ -13,7 +13,7 @@
#define FLASH_WRITE_ADDR (0x0003C000u)
-void SystemClockConfig(void);
+static void SystemClockConfig(void);
uint16_t m_au16Adc1SaValue[4];
@@ -128,7 +128,7 @@ static void SystemClockConfig(void)
void FeedDog(void)
{
-#if (WATCH_DOG == 1)
+#if (USE_DEBUG == 1)
SWDT_RefreshCounter();
#endif
}
@@ -1059,7 +1059,7 @@ void BSP_Init(void)
Xtal32_ClockConfig();
GPIO_Config();
DbgUart_Config(500000);
- RS485Uart_Config(9600);
+ RS485Uart_Config(9600);
Rtc_Config();
// SdioInit();
//Spi_Config();
@@ -1152,7 +1152,7 @@ void Error_Handler(void)
-__weak void RS485UsartErrIrqCallback(void)
+__WEAK void RS485UsartErrIrqCallback(void)
{
if(RS485_USART_CH->SR_f.ORE) {
RS485_USART_CH->CR1_f.CORE = 1;
@@ -1170,7 +1170,7 @@ __weak void RS485UsartErrIrqCallback(void)
-__weak void RS485_RxPinIntCallBack(void)
+__WEAK void RS485_RxPinIntCallBack(void)
{
}
@@ -1178,7 +1178,7 @@ __weak void RS485_RxPinIntCallBack(void)
-__weak void DBGUsartErrIrqCallback(void)
+__WEAK void DBGUsartErrIrqCallback(void)
{
if(DBG_USART_CH->SR_f.ORE) {
DBG_USART_CH->CR1_f.CORE = 1;
@@ -1192,12 +1192,12 @@ __weak void DBGUsartErrIrqCallback(void)
DBG_USART_CH->CR1_f.CFE = 1;
}
-__weak void DbgUsartRxIrqCallback(void)
+__WEAK void DbgUsartRxIrqCallback(void)
{
}
-__weak void DBG_RxPinIntCallBack(void)
+__WEAK void DBG_RxPinIntCallBack(void)
{
}
@@ -1207,7 +1207,7 @@ __weak void DBG_RxPinIntCallBack(void)
* :
* ֵ:
*****************************************************************************************/
-__weak void RtcPeriod_IrqCallback(void)
+__WEAK void RtcPeriod_IrqCallback(void)
{
}
@@ -1220,7 +1220,7 @@ __weak void RtcPeriod_IrqCallback(void)
*****************************************************************************************/
extern void ADC_DMA_CallBack(void);
//int test = 0;
-__weak void Dma1Btc0_IrqHandler(void)
+__WEAK void Dma1Btc0_IrqHandler(void)
{
DMA_ClearIrqFlag(M4_DMA1, DmaCh0, BlkTrnCpltIrq);
ADC_DMA_CallBack();
diff --git a/Project/HC32F460/source/User/Src/main.c b/Project/HC32F460/source/User/Src/main.c
index 464f3bb..7b17b15 100644
--- a/Project/HC32F460/source/User/Src/main.c
+++ b/Project/HC32F460/source/User/Src/main.c
@@ -2,7 +2,7 @@
#include
#include "main.h"
-#include "encryption.h"
+#include "Encryption.h"
#include "Debug.h"
@@ -56,7 +56,7 @@ int main(void)
{
BSP_Init();
DBG_LOG("**********************************************\r\n");
- DBG_LOG("* Ver 1.0 2025-09-09 *\r\n");
+ DBG_LOG("* Ver 1.0 2024-01-15 *\r\n");
DBG_LOG("**********************************************\r\n");
while(1) {
DebugLoopHandler();
@@ -83,14 +83,14 @@ void SysTick_IrqHandler(void)
*****************************************************************************************/
void DBG_RxPinIntCallBack(void)
{
- PORT_Toggle(LED_Blue_PORT, LED_Blue_PIN);
+ //PORT_Toggle(LED_Blue_PORT, LED_Blue_PIN);
}
void RtcPeriod_IrqCallback(void)
{
- PORT_Toggle(LED_Green_PORT, LED_Green_PIN);
+ //PORT_Toggle(LED_Green_PORT, LED_Green_PIN);
}
diff --git a/driver/inc/hc32f460_icg.h b/driver/inc/hc32f460_icg.h
index ee38d3b..2497bef 100644
--- a/driver/inc/hc32f460_icg.h
+++ b/driver/inc/hc32f460_icg.h
@@ -23,11 +23,10 @@
******************************************************************************/
#include "hc32_common.h"
#include "ddl_config.h"
+#include "bsp.h"
#if (DDL_ICG_ENABLE == DDL_ON)
-#define WATCH_DOG 0
-
/* C binding of definitions if building with C++ compiler */
#ifdef __cplusplus
extern "C"
@@ -259,7 +258,7 @@ extern "C"
** \brief SWDT hardware start configuration
******************************************************************************/
/*!< Enable or disable SWDT hardware start */
-#if (WATCH_DOG == 1)
+#if (USE_DEBUG == 1)
#define ICG0_SWDT_HARDWARE_START (ICG_FUNCTION_ON)
#else
#define ICG0_SWDT_HARDWARE_START (ICG_FUNCTION_OFF)